DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
68,69,70,
71
GPIO0~3
I/O
General I/O Ports
Registers GPCR and GPR can program these pins
The GPIO0 is an output mode, and output data high at default is to power
down internal PHY and other external MII device
GPIO1~3 defaults are input ports
Cable Link Status Output. Active High
This pin is also used as a strap pin to define whether the MII interface is a
reversed MII interface (pulled high) or a normal MII interface (not pulled
high). This pin has a pulled down resistor about 60k ohm internally.
Issue a wake up signal when wake up event happens
This pin has a pulled down resistor about 60k ohm internally.
Power on Reset
Active low signal to initiate the DM9000
The DM9000 is ready after 5us when this pin deasserted
Not Connect
78
LINK_O
O
79
80
WAKEUP
PW_RST#
O
I
24,74,75,
77
NC
5.8 Power Pins
5,20,36,
DVDD
55,72,90,
73
15,23,42,
DGND
58,63,81,
99,76
P
Digital VDD
P
Digital GND
Final
Version: DM9000-DS-F03
April 23, 2009
10
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
