Specifications
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100-pin LQFP.
Supports processor interface: Byte/word/Dword of I/O command to internal memory
Integrated 10/100M transceiver with
Supports MII and reverses MII interface
Supports back pressure mode for half-duplex mode flow control
IEEE802.3x flow control for full-duplex mode
Supports wakeup frame, link status change and magic packet events for remote wake up
Integrated 16K Byte SRAM
Build in 3.3V to 2.5V regulator
Supports early Transmit
Supports IP/TCP/UDP checksum generation and checking
Supports automatically load vendor ID and
Supports 7 or 23 GPIO pins
Optional EEPROM configuration
Very low power consumption mode:
Power reduced mode (cable detection)
Power down mode
Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.
1: 1 transformers only when HP Auto-MDIX Enable .
Compatible with 3.3V and 5.0V tolerant I/O
product ID from EEPROM
data operation
HP Auto-MDIX
Application
VoIP CPE (ATA, IP Phone, Video Phone)
IP STB, IPC, Internet Radio
Ordering Information
Part Number
DM9010E
DM9010EP
Pin Count
100
100
Package
LQFP
LQFP(Pb-Free)
DAVICOM Semiconductor, Inc.
No.6, Li-Hsin Rd.VI, Science Park, Hsin-Chu, Taiwan, R.O.C.
TEL: 886-3-5798797
FAX: 886-3-5646929
E-mail:
sales@davicom.com.tw