DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
6.29 T
RANSMIT
C
HECK
S
UM
C
ONTROL
R
EGISTER
(31H).................................................................................................... 24
6.30 R
ECEIVE
C
HECK
S
UM
C
ONTROL
S
TATUS
R
EGISTER
(32H).......................................................................................... 24
6.31 E
XTERNAL
PHY
CEIVER
A
DDRESS
R
EGISTER
(33H).................................................................................................... 24
6.32 G
ENERAL
P
URPOSE
C
ONTROL
R
EGISTER
2 (34H) ....................................................................................................... 25
6.33 G
ENERAL
P
URPOSE
R
EGISTER
2 (35H) ....................................................................................................................... 25
6.34 G
ENERAL
P
URPOSE
C
ONTROL
R
EGISTER
3 (36H) ....................................................................................................... 25
6.35 G
ENERAL
P
URPOSE
R
EGISTER
3 (37H) ....................................................................................................................... 25
6.36 P
ROCESSOR
B
US
C
ONTROL
R
EGISTER
(38H) .............................................................................................................. 25
6.37 INT P
IN
C
ONTROL
R
EGISTER
(39H)............................................................................................................................ 26
6.38 M
ONITOR
R
EGISTER
1 (40H) ...................................................................................................................................... 26
6.39 M
ONITOR
R
EGISTER
2 (41H) ...................................................................................................................................... 26
6.40 S
YSTEM
C
LOCK
T
URN
ON C
ONTROL
R
EGISTER
(50H) ............................................................................................... 26
6.41 R
ESUME
S
YSTEM
C
LOCK
C
ONTROL
R
EGISTER
(51H) ................................................................................................. 26
6.42 M
EMORY
D
ATA
P
RE
-F
ETCH
R
EAD
C
OMMAND WITHOUT
A
DDRESS
I
NCREMENT
R
EGISTER
(F0H)............................... 26
6.43 M
EMORY
D
ATA
R
EAD
C
OMMAND WITHOUT
A
DDRESS
I
NCREMENT
R
EGISTER
(F1H) ................................................. 27
6.44 M
EMORY
D
ATA
R
EAD
C
OMMAND WITH
A
DDRESS
I
NCREMENT
R
EGISTER
(F2H)........................................................ 27
6.45 M
EMORY
D
ATA
R
EAD ADDRESS
R
EGISTER
(F4H~F5H) .............................................................................................. 27
6.46 M
EMORY
D
ATA
W
RITE
C
OMMAND WITHOUT
A
DDRESS
I
NCREMENT
R
EGISTER
(F6H)................................................ 27
6.47 M
EMORY DATA WRITE COMMAND WITH ADDRESS INCREMENT
R
EGISTER
(F8H) ......................................................... 27
6.48 M
EMORY DATA WRITE ADDRESS
R
EGISTER
(FAH~FBH)............................................................................................. 27
6.49 TX P
ACKET
L
ENGTH
R
EGISTER
(FCH~FDH) ............................................................................................................. 27
6.50 I
NTERRUPT
S
TATUS
R
EGISTER
(FEH).......................................................................................................................... 28
6.51 I
NTERRUPT
M
ASK
R
EGISTER
(FFH)............................................................................................................................ 28
7. EEPROM FORMAT ........................................................................................................................................................ 29
8. MII REGISTER DESCRIPTION ................................................................................................................................... 30
8.1 B
ASIC
M
ODE
C
ONTROL
R
EGISTER
(BMCR) - 00 .......................................................................................................... 31
8.2 B
ASIC
M
ODE
S
TATUS
R
EGISTER
(BMSR) - 01 .............................................................................................................. 32
8.3 PHY ID I
DENTIFIER
R
EGISTER
#1 (PHYID1) - 02 ........................................................................................................ 33
8.4 PHY ID I
DENTIFIER
R
EGISTER
#2 (PHYID2) - 03 ........................................................................................................ 33
8.5 A
UTO
-
NEGOTIATION
A
DVERTISEMENT
R
EGISTER
(ANAR) - 04 .................................................................................... 33
8.6 A
UTO
-
NEGOTIATION
L
INK
P
ARTNER
A
BILITY
R
EGISTER
(ANLPAR) – 05..................................................................... 34
8.7 A
UTO
-
NEGOTIATION
E
XPANSION
R
EGISTER
(ANER) - 06 ............................................................................................. 35
8.8 DAVICOM S
PECIFIED
C
ONFIGURATION
R
EGISTER
(DSCR) - 16.................................................................................. 35
8.9 DAVICOM S
PECIFIED
C
ONFIGURATION AND
S
TATUS
R
EGISTER
(DSCSR) - 17 ........................................................... 37
8.10 10BASE-T C
ONFIGURATION
/S
TATUS
(10BTCSR) - 18............................................................................................... 38
8.11 P
OWER
D
OWN
C
ONTROL
R
EGISTER
(PWDOR) - 19 ................................................................................................... 38
8.12 (S
PECIFIED CONFIG
) R
EGISTER
– 20 ............................................................................................................................ 39
9. FUNCTIONAL DESCRIPTION..................................................................................................................................... 40
9.1 H
OST
I
NTERFACE
.......................................................................................................................................................... 40
9.2 D
IRECT
M
EMORY
A
CCESS
C
ONTROL
............................................................................................................................ 40
9.3 P
ACKET
T
RANSMISSION
................................................................................................................................................ 40
9.4 P
ACKET
R
ECEPTION
...................................................................................................................................................... 40
9.5 100B
ASE
-TX O
PERATION
............................................................................................................................................. 40
9.5.1 4B5B Encoder ...................................................................................................................................................... 41
9.5.2 Scrambler ............................................................................................................................................................. 41
9.5.3 Parallel to Serial Converter................................................................................................................................. 41
9.5.4 NRZ to NRZI Encoder .......................................................................................................................................... 41
9.5.5 MLT-3 Converter.................................................................................................................................................. 41
9.5.6 MLT-3 Driver ....................................................................................................................................................... 41
9.5.7 4B5B Code Group ................................................................................................................................................ 42
9.6 100B
ASE
-TX R
ECEIVER
............................................................................................................................................... 43
Preliminary
Version: DM9010BI--DS-P01
January 12, 2010
3
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
