DELIVERABLES
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Source code:
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VHDL Source Code or/and
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VERILOG Source Code or/and
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Encrypted, or plain text EDIF netlist
VHDL & VERILOG test bench
environment
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Active-HDL automatic simulation macros
◊
ModelSim automatic simulation macros
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Tests with reference responses
Technical documentation
◊
Installation notes
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HDL core specification
◊
Datasheet
Synthesis scripts
Example application
Technical support
◊
IP Core implementation support
◊
3 months maintenance
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DESIGN FEATURES
The functionality of the D16750 core was
based on the Texas Instruments TL16C750A.
The following characteristics differentiate the
D16750 from Texas Instruments devices:
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The bi-directional data bus has been split
into two separate buses: datai(7:0),
datao(7:0)
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Signals rd2 and wr2, xin, and xout have
been removed from interface
Signal ADS and address latch have been
removed
The DLL, DLM and THR registers are
reset to all zeros
TEMT and THRE bits of Line Status
Register, are reset during the second
clock rising edge following a THR write
RCLK clock is replaced by global clock
CLK, internally divided by BAUD factor.
Asynchronous microcontroller interface is
replaced by equivalent Universal interface
All latches implemented in original 16750
devices are replaced by equivalent flip-flop
registers, with the same functionality
♦
♦
♦
♦
♦
Delivery the IP Core updates, minor
and major versions changes
Delivery the documentation updates
Phone & email support
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CONFIGURATION
The following parameters of the D16750 core
can be easy adjusted to requirements of
dedicated
application
and
technology.
Configuration of the core can be prepared by
effortless changing appropriate constants in
package file. There is no need to change any
parts of the code.
•
Baud generator
•
External RCLK source
•
External BAUDCLK source
•
Modem Control logic
•
SCR Register
•
FIFO Control logic
•
FIFO size
- enable
- disable
- enable
- disable
- enable
- disable
- enable
- disable
- enable
- disable
- enable
- disable
- standard 16/64
- large up to 512
All trademarks mentioned in this document
are trademarks of their respective owners.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.
DCD [ DIGITAL CORE DESIGN ]
