DR805x Instructions set details
- 30 -
3.9.
DA
DA A
Decimal adjust accumulator for addition
DA A adjusts the eight-bit value in the accumulator resulting from the
earlier addition of two variables (each in packed BCD format),
producing two four-bit digits. Any ADD or ADDC instruction may have
been used to perform the addition. If accumulator bits 3-0 are greater
than nine (xxxx1010-xxxx1111), or if the AC flag is one, six is added to
the accumulator producing the proper BCD digit in the low- order nibble.
This internal addition would set the carry flag if a carry-out of the low-
order four-bit field propagated through all high-order bits, but it would
not clear the carry flag otherwise.
If the carry flag is now set, or if the four high-order bits now exceed nine
(1010xxxx-1111xxxx), these high-order bits are incremented by six,
producing the proper BCD digit in the high-order nibble. Again, this
would set the carry flag if there was a carry-out of the high-order bits,
but wouldn't clear the carry. The carry flag thus indicates if the sum of
the original two BCD variables is greater than 100, allowing multiple
precision decimal addition. OV is not affected.
All of this occurs during the one instruction cycle. Essentially; this
instruction performs the decimal conversion by adding 00 H , 06 H , 60
H , or 66 H to the accumulator, depending on initial accumulator and
PSW conditions.
DA A
cannot
simply convert a hexadecimal number in the accumulator
to BCD notation, nor does DA A apply to decimal subtraction.
(PC)
←
(PC) + 1
if [[(A3-0) > 9] ^ [(AC) = 1]] then
(A3-0)
←
(A3-0) + 6
next
if [[(A7-4) > 9] ^ [(C) = 1]] then
(A7-4)
←
(A7-4) + 6
1
4
Instruction:
Function:
Description:
Note:
Operation:
Bytes:
Cycles:
Encoding:
1
1
0
1
0
1
0
0
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