TEST CONFIGURATIONS
TO OSCILLOSCOPE
DESIGN CONSIDERATIONS
Input Source Impedance
V
I
(+)
L
2
100uF
Tantalum
BATTERY
V
I
(-)
Note: Input reflected-ripple current is measured with a
simulated source inductance. Current is
measured at the input of the module.
Figure 28:
Input reflected-ripple test setup
To maintain low-noise and ripple at the input voltage, it is
critical to use low ESR capacitors at the input to the
module. The models using 6x47uF low ESR tantalum
capacitors (SANYO P/N:16TQC47M, 47uF/16V or
equivalent) and 6x22 uF very low ESR ceramic
capacitors (TDK P/N:C3225X7S1C226MT, 22uF/16V or
equivalent) for example.
The input capacitance should be able to handle an AC
ripple current of at least:
Irms
=
Iout
Vout
⎛
Vout
⎞
⎜
1
−
⎟
Vin
⎝
Vin
⎠
Arms
COPPER STRIP
Vo
470uF 100uF SCOPE
poscap ceramic
Resistive
Load
GND
Note: Use a 470μF poscap and 100μF ceramic. Scope
measurement should be made using a BNC
connector.
Figure 29:
Peak-peak output noise and startup transient
measurement test setup
CONTACT AND
DISTRIBUTION LOSSES
VI
I
SUPPLY
Vo
Io
LOAD
GND
CONTACT RESISTANCE
Figure 30:
Output voltage and efficiency measurement test
setup
Note: All measurements are taken at the module
terminals. When the module is not soldered (via
socket), place Kelvin connections at module
terminals to avoid measurement errors due to
contact resistance.
η
=
(
Vo
×
Io
)
×
100 %
Vi
×
Ii
8
PRELIMINARY DS_DNL10SIP20_10132008
DELTA [ DELTA ELECTRONICS, INC. ]
