TEST CONFIGURATIONS
TO OSCILLOSCOPE
DESIGN CONSIDERATIONS
Input Source Impedance
V
I
(+)
L
2
100uF
Tantalum
BATTERY
V
I
(-)
Note: Input reflected-ripple current is measured with a
simulated source inductance. Current is
measured at the input of the module.
Figure 17:
Input reflected-ripple test setup
To maintain low-noise and ripple at the input voltage, it is
critical to use low ESR capacitors at the input to the
module. Figure 20 shows the input ripple voltage
(mVp-p) for various output models using 2x47 uF low
ESR tantalum capacitors (SANYO P/N:16TQC47M,
47uF/16V or equivalent) and 2x22 uF very low ESR
ceramic capacitors (TDK P/N:C3225X7S1C226MT,
22uF/16V or equivalent).
The input capacitance should be able to handle an AC
ripple current of at least:
Irms
=
Iout
Vout
⎛
Vout
⎞
⎜
1
−
⎟
Vin
⎝
Vin
⎠
Arms
COPPER STRIP
Vo
Input Ripple Voltage (mVp-p)
1uF
10uF
SCOPE
tantalum ceramic
Resistive
Load
300
250
200
150
100
50
0
0
1
2
3
O
utput V
oltage (V
dc)
4
5
6
GND
Note: Use a 10μF tantalum and 1μF capacitor. Scope
measurement should be made using a BNC
connector.
Figure 18:
Peak-peak output noise and startup transient
measurement test setup
CONTACT AND
DISTRIBUTION LOSSES
VI
I
SUPPLY
Vo
Io
LOAD
Tantalum
Ceramic
GND
Figure 20:
Input ripple voltage for various Output models,
Io = 6A (Cin = 2x47uF tantalum capacitors and
2x22uF ceramic capacitors at the input)
CONTACT RESISTANCE
Figure 19:
Output voltage and efficiency measurement test
setup
Note: All measurements are taken at the module
terminals. When the module is not soldered (via
socket), place Kelvin connections at module
terminals to avoid measurement errors due to
contact resistance.
η
=
(
Vo
×
Io
)
×
100 %
Vi
×
Ii
6
DS_DNS10SIP06_03092009
DELTA [ DELTA ELECTRONICS, INC. ]
