TEST CONFIGURATIONS
TO OSCILLOSCOPE
DESIGN CONSIDERATIONS
Input Source Impedance
V
I
(+)
L
BATTERY
4
×
47uF
ceramic
V
I
(-)
To maintain low-noise and ripple at the input voltage, it is
critical to use low ESR capacitors at the input to the
module. The models using 4x47 uF very low ESR
ceramic
capacitors
(MURATA
P/N:
GRM32ER61C476ME15L, 47uF/16V or equivalent) for
example.
The input capacitance should be able to handle an AC
ripple current of at least:
Irms
=
Iout
Vout
Vout
1
−
Vin
Vin
Note: Input reflected-ripple current is measured with a
simulated source inductance. Current is
measured at the input of the module.
Figure 25:
Input reflected-ripple test setup
Arms
450
CO PPER STRIP
Vo
1uF
100uF
SCOPE
ceramic ceram ic
Resistive
Load
Input Ripple Voltage (mVp-p)
400
350
300
250
200
150
100
50
0
0
1
2
3
Output Voltage (Vdc)
4
5
6
GND
Ceramic
Note: Use a 100µF and 1µF ceramic capacitor. Scope
measurement should be made using a BNC
connector.
Figure 26:
Peak-peak output noise and startup transient
measurement test setup
CONTACT AND
DISTRIBUTION LOSSES
VI
I
SUPPLY
Vo
Io
LOAD
Figure 28:
Input ripple voltage vs. output models, Io = 20A
(Cin = 4x22uF ceramic capacitors at the input)
GND
CONTACT RESISTANCE
Figure 27:
Output voltage and efficiency measurement test
setup
Note: All measurements are taken at the module
terminals. When the module is not soldered (via
socket), place Kelvin connections at module
terminals to avoid measurement errors due to
contact resistance.
η
=
(
Vo
×
Io
)
×
100 %
Vi
×
Ii
7
DS_DNL10SMD_07182012
DELTA [ DELTA ELECTRONICS, INC. ]
