DCR806SG
10000
I
T
Q
S
dI/dt
I
RR
100
I
T
= 1250A
I
T
= 500A
Max. value
Gate trigger voltage V
GT
- (V)
Pulse width Frequency Hz Table gives pulse power P
GM
in Watts
µs
50 100 400
100
150 150 150
200
150 150 125
500
150 150 100
1ms
150 100 25
10ms
20 - -
10
50
0W
20
W
10
Total stored charge Q
S
- (µC)
W
5W
W
10
1000
I
T
= 1250A
I
T
= 500A
Min. value
Up
1
pe
it
r lim
99%
T
j
= 25˚C
T
j
= -40˚C
Region of certain
triggering
100
0.1
Conditions:
Q
S
is total integral stored charge
T
j
= 125˚C
1.0
10
Rate of decay of on-state current dI/dt - (A/µs)
100
V
GD
Low
99
mit
er li
%
0.1
0.001
0.01
T
j
= 125˚C
0.1
1
Gate trigger current, I
GT
- (A)
10
I
FGM
Fig.4 Stored charge
25
Fig.5 Gate characteristics
0.1
Anode side cooled
I
2
t = Î
2
x t
2
20
Peak half sine wave on-state current - (kA)
Thermal Impedance - Junction to case (˚C/W)
Double side cooled
15
400
0.01
I
2
t value - (A
2
s x 10
3
)
10
I
2
t
350
Conduction
Effective thermal resistance
Junction to case ˚C/W
Double side
0.032
0.034
0.044
0.057
Anode side
0.064
0.066
0.076
0.089
5
300
d.c.
Halfwave
3 phase 120˚
6 phase 60˚
0.001
0.001
0.01
0.1
Time - (s)
1.0
10
0
1
ms
10
1
2 3 45
10
250
20 30 50
Cycles at 50Hz
Duration
Fig.6 Maximum (limit) transient thermal impedance -
junction to case
Fig.7 Surge (non-repetitive) on-state current vs time (with
50% V
RRM
at T
case
125˚C)
6/8
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