MA28155
Output Control Signal Definition (Mode 1)
OBFN
(Output Buffer Full Register Bit).
The OBFN output will go low to indicate that the CPU has
written data out to the specified port. The OBF register bit will
be set by the rising edge of the DSN input and reset by ACKN
input being low.
ACKN
(Acknowledge Input).
A low on this input informs the 28155 that the data from
port A or port B has been accepted; in essence, a response
from the peripheral device indicating that it has received the
data output by the CPU.
INTR (Interrupt Request).
A high on this output can be used to interrupt the CPU
when an output device has accepted data transmitted by the
CPU. INTR is set when ACKN is high, OBFN is high and INTE
is high. It is reset by the falling edge of DSN.
INTE A: Controlled by bit set/reset of PC
6
INTE B: Controlled by bit set/reset of PC
2
OBF
A
N
OBF
B
N
ACK
A
N
ACK
B
N
DSN
RD/WN
DSN
RD/WN
Figure 11: Strobed Output (PORT A)
Figure 12: Strobed Output (PORT B)
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