EL4093C
300 MHz DC-Restored Video Amplifier
Applications Information
Contd
conjunction with the feedback and gain resistors)
creates a pole in the feedback path of the amplifi-
er This pole if low enough in frequency has the
same destabilizing effect as a zero in the forward
open-loop response Hence it is important to min-
imize the stray capacitance at this node by re-
moving the nearby ground plane In addition
since the S H output connects to this node it is
important to minimize the trace capacitance
Good practice here would be to connect the two
pins with a short trace directly underneath the
chip
Power Supply Bypassing and Printed
Circuit Board Layout
As with any high frequency device good printed
circuit board layout is necessary for optimum
performance Ground plane construction is high-
ly recommended Lead lengths should be as short
as possible The power supply pins must be well
bypassed to reduce the risk of oscillation In the
EL4093C there are two sets of supply pins
V
a
1 V
b
1 provide power for the CFA and
V
a
2 V
b
2 are for the S H amplifier Good per-
formance can be achieved using only one set of
bypass capacitors although they must be close to
the V
a
1 V-1 pins since that is where the high
frequency currents flow The combination of a
4 7
mF
tantalum capacitor in parallel with a
0 01
mF
capacitor has been shown to work well
Chip capacitors are recommended for the 0 01
mF
bypass to minimize lead inductance
For good AC performance parasitic capacitance
should be kept to a minimum especially at the
CFA inverting input Ground plane construction
should be used but it should be removed from
the area near the inverting input to minimize any
stray capacitance at that node Chip resistors are
recommended for R
F
and R
G
and use of sockets
should be avoided if possible Sockets add para-
sitic inductance and capacitance which will result
in some additional peaking and overshoot
If the CFA is configured for non-inverting gain
then one should also pay attention to the trace
leading to the
a
input The inductance of a long
trace (
l
3’’) can form a resonant network with
the amplifier input resulting in high frequency
oscillations around 700 MHz In such cases a
50X –100X series resistor placed close to the
a
in-
put would isolate this inductance and damp out
the resonance
Feedback Resistor Values
The EL4093C has been optimized for a gain of
a
2 with R
F
e
750X This value of feedback re-
sistor gives a 3 dB bandwidth of 300 MHz at a
gain of
a
2 driving a 150X load Since the ampli-
fier inside the EL4093C uses current mode feed-
back it is possible to change the value of R
F
to
adjust the bandwidth Shown in the table below
are optimum feedback resistor values for differ-
ent closed loop gains
Gain
a
1
a
2
a
5
b
1
Optimum RF
910
750
470
680
BW (MHz)
314
300
294
300
Peaking (dB)
02
0
02
0
Autozero Interface
The autozero interface refers to the connection
between the S H output and the CFA inverting
input This interface has been greatly simplified
compared to that of the EL2090C in that the
S H output is a high impedance current source
The S H output can be connected directly to the
inverting input and its high impedance greatly
reduces the interaction between the sample
hold and the gain setting resistors Another vir-
tue of this interface is better gain linearity as the
autozero current changes For example at an au-
tozero current of 0 mA the output impedance is
about 5 MX dropping to 1 MX as the autozero
current increases to 3 mA Using R
F
e
R
G
e
750X the closed loop gain changes only by
0 025% in this interval
Capacitance at the Inverting Input
Any manufacturer’s high-speed voltage or cur-
rent feedback amplifier can be affected by stray
capacitance at the inverting input For inverting
gains this parasitic capacitance has little effect
because the inverting input is a virtual ground
but for non-inverting gains this capacitance (in
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ELANTEC [ ELANTEC SEMICONDUCTOR ]
