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EBD11ED8ADFB-5 参数 Datasheet PDF下载

EBD11ED8ADFB-5图片预览
型号: EBD11ED8ADFB-5
PDF下载: 下载PDF文件 查看货源
内容描述: 1GB无缓冲DDR SDRAM DIMM ( 128M字X72位, 2级) [1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 19 页 / 183 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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DATA SHEET
1GB Unbuffered DDR SDRAM DIMM
EBD11ED8ADFB-5 (128M words
×
72 bits, 2 Ranks)
Description
The EBD11UD8ADFB is 128M words
×
72 bits, 2 ranks
Double Data Rate (DDR) SDRAM unbuffered module,
mounting 18 pieces of 512M bits DDR SDRAM sealed
in TSOP package. Read and write operations are
performed at the cross points of the CK and the /CK.
This high-speed data transfer is realized by the 2 bits
prefetch-pipelined architecture. Data strobe (DQS)
both for read and write are available for high speed and
reliable data bus design. By setting extended mode
register, the on-chip Delay Locked Loop (DLL) can be
set enable or disable. This module provides high
density mounting without utilizing surface mount
technology.
Decoupling capacitors are mounted
beside each TSOP on the module board.
Features
184-pin socket type dual in line memory module
(DIMM)
PCB height: 31.75mm
Lead pitch: 1.27mm
2.6V power supply
Data rate: 400Mbps (max.)
2.5 V (SSTL_2 compatible) I/O
Double Data Rate architecture; two data transfers per
clock cycle
Bi-directional, data strobe (DQS) is transmitted
/received with data, to be used in capturing data at
the receiver
Data inputs and outputs are synchronized with DQS
4 internal banks for concurrent operation
(Component)
DQS is edge aligned with data for READs; center
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge; data
referenced to both edges of DQS
Auto precharge option for each burst access
Programmable burst length: 2, 4, 8
Programmable /CAS latency (CL): 3
Programmable output driver strength: normal/weak
Refresh cycles: (8192 refresh cycles /64ms)
7.8µs maximum average periodic refresh interval
2 variations of refresh
Auto refresh
Self refresh
Document No. E0408E30 (Ver. 3.0)
Date Published February 2004 (K) Japan
URL: http://www.elpida.com
Elpida
Memory , Inc. 2003-2004