EBD10RD4ABFA
Serial PD Matrix*
Byte No.
0
1
2
3
4
5
6
7
8
9
1
Function described
Number of bytes utilized by module
manufacturer
Total number of bytes in serial PD
device
Memory type
Number of row address
Number of column address
Number of DIMM ranks
Module data width
Module data width continuation
DDR SDRAM cycle time, CL = X
-6B
-7A, -7B
SDRAM access from clock (tAC)
-6B
-7A, -7B
DIMM configuration type
Refresh rate/type
Primary SDRAM width
Error checking SDRAM width
SDRAM device attributes:
Minimum clock delay back-to-back
column access
SDRAM device attributes:
Burst length supported
SDRAM device attributes: Number of
banks on SDRAM device
SDRAM device attributes:
/CAS latency
SDRAM device attributes:
/CS latency
SDRAM device attributes:
/WE latency
SDRAM module attributes
SDRAM device attributes: General
Bit7
1
0
0
0
0
0
0
0
Bit6
0
0
0
0
0
0
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
1
1
Bit5 Bit4
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
0
0
1
Bit3
0
1
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
1
0
Bit2
0
0
1
1
1
0
0
0
1
0
1
0
1
0
0
1
1
0
1
1
1
0
0
1
0
1
0
0
1
0
0
0
0
Bit1 Bit0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
1
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
Hex value
80H
08H
07H
0DH
0CH
01H
48H
00H
04H
60H
75H
70H
75H
02H
82H
04H
04H
01H
0EH
04H
0CH
01H
02H
26H
C0H
75H
A0H
70H
75H
00H
00H
48H
50H
Comments
128
256 byte
SDRAM DDR
13
12
1
72 bits
0 (+)
SSTL 2.5V
CL = 2.5*
3
Voltage interface level of this assembly 0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
10
0.70ns*
3
0.75ns*
3
ECC
7.8 µs
Self refresh
×
4
×
4
1 CLK
2, 4, 8
4
2/2.5
0
1
Registered
± 0.2V
CL = 2*
3
11
12
13
14
15
16
17
18
19
20
21
22
23
Minimum clock cycle time at CLX - 0.5
0
-6B, -7A
-7B
1
Maximum data access time (tAC) from
clock at CLX - 0.5
0
-6B
-7A, -7B
0
0
Minimum clock cycle time at CLX - 1
24
0.70ns*
3
0.75ns*
3
25
26
27
Maximum data access time (tAC) from
0
clock at CLX - 1
Minimum row precharge time (tRP)
0
-6B
-7A, -7B
0
18ns
20ns
Preliminary Data Sheet E0274E40 (Ver. 4.0)
5
ELPIDA [ ELPIDA MEMORY ]
