EDD2508AMTA-5B-E
DC Characteristics 1 (TA = 0°C to +70°C, VDD, VDDQ = 2.6V ± 0.1V, VSS, VSSQ = 0V)
Parameter
Operating current (ACT-PRE)
Operating current
(ACT-READ-PRE)
Symbol
IDD0
IDD1
Grade
max.
85
120
4
35
35
25
50
225
200
155
3
300
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Test condition
CKE
≥
VIH,
tRC = tRC (min.)
CKE
≥
VIH, BL = 4,CL = 3,
tRC = tRC (min.)
CKE
≤
VIL
CKE
≥
VIH, /CS
≥
VIH
DQ, DQS, DM = VREF
CKE
≥
VIH, /CS
≥
VIH
DQ, DQS, DM = VREF
CKE
≤
VIL
CKE
≥
VIH, /CS
≥
VIH
tRAS = tRAS (max.)
CKE
≥
VIH, BL = 2, CL = 3
CKE
≥
VIH, BL = 2,CL = 3
tRFC = tRFC (min.),
Input
≤
VIL or
≥
VIH
Input
≥
VDD – 0.2 V
Input
≤
0.2 V
BL = 4
5, 6, 7
Notes
1, 2, 9
1, 2, 5
4
4, 5
4, 10
3
3, 5, 6
1, 2, 5, 6
1, 2, 5, 6
Idle power down standby current IDD2P
Floating idle standby current
Quiet idle standby current
Active power down standby
current
IDD2F
IDD2Q
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
IDD6
IDD7A
EO
Active standby current
Operating current
(Burst read operation)
Operating current
(Burst write operation)
Auto Refresh current
Self refresh current
Operating current
(4 banks interleaving)
Parameter
Input leakage current
Output leakage current
Output high current
Output low current
ILI
Data Sheet E0750E10 (Ver. 1.0)
Notes: 1. These IDD data are measured under condition that DQ pins are not connected.
2. One bank operation.
3. One bank active.
4. All banks idle.
5. Command/Address transition once per one clock cycle.
6. DQ, DM and DQS transition twice per one clock cycle.
7. 4 banks active. Only one bank is running at tRC = tRC (min.)
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.
9. Command/Address transition once every two clock cycle.
10. Command/Address stable at
≥
VIH or
≤
VIL.
DC Characteristics 2 (TA = 0°C to +70°C, VDD, VDDQ = 2.6V ± 0.1V, VSS, VSSQ = 0V)
Symbol
min.
max.
Unit
L
–2
ILO
IOH
IOL
–5
od
Pr
2
µA
5
µA
–16.2
16.2
—
mA
—
mA
Test condition
Notes
VDD
≥
VIN
≥
VSS
VDDQ
≥
VOUT
≥
VSS
VOUT = 1.95V
VOUT = 0.35V
t
uc
6
ELPIDA [ ELPIDA MEMORY ]
