EDE2508ABSE, EDE2516ABSE
max.
Parameter
Symbol
IDD5
Grade
× 8
× 16
Unit
mA
Test condition
tCK = tCK (IDD);
-6C, -6E 120
120
Refresh command at every tRFC (IDD) interval;
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Auto-refresh current
-5C
115
6
115
6
Self Refresh Mode;
CK and /CK at 0V;
CKE ≤ 0.2V;
Other control and address bus inputs are FLOATING;
Data bus inputs are FLOATING
Self-refresh
current
IDD6
IDD7
mA
mA
all bank interleaving reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = tRCD (IDD) −1 × tCK
(IDD);
tCK = tCK (IDD), tRC = tRC (IDD), tRRD = tRRD(IDD),
tRCD = 1 × tCK (IDD);
CKE is H, CS is H between valid commands;
Address bus inputs are STABLE during DESELECTs;
Data pattern is same as IDD4W;
-6C, -6E 190
210
190
Operating current
(Bank interleaving)
5C
180
Notes: 1. IDD specifications are tested after the device is properly initialized.
2. Input slew rate is specified by AC Input Test Condition.
3. IDD parameters are specified with ODT disabled.
4. Data bus consists of DQ, DM, DQS, /DQS, RDQS, /RDQS, LDQS, /LDQS, UDQS, and /UDQS. IDD
values must be met with all combinations of EMRS bits 10 and 11.
5. Definitions for IDD
L is defined as VIN ≤ VIL (AC) (max.)
H is defined as VIN ≥ VIH (AC) (min.)
STABLE is defined as inputs stable at an H or L level
FLOATING is defined as inputs at VREF = VDDQ/2
SWITCHING is defined as:
inputs changing between H and L every other clock cycle (once per two clocks) for address and control
signals, and inputs changing between H and L every other data transfer (once per clock) for DQ signals
not including masks or strobes.
6. Refer to AC Timing for IDD Test Conditions.
AC Timing for IDD Test Conditions
For purposes of IDD testing, the following parameters are to be utilized.
DDR2-667
DDR2-533
Parameter
4-4-4
4
5-5-5
5
4-4-4
4
CL(IDD)
tRCD(IDD)
tRC(IDD)
12
15
15
57
60
60
tRRD(IDD) × 8
tCK(IDD)
7.5
3
7.5
3
7.5
3.75
45
tRAS(min.)(IDD)
tRAS(max.)(IDD)
tRP(IDD)
45
45
70000
12
70000
15
70000
15
tRFC(IDD)
75
75
75
Preliminary Data Sheet E0573E30 (Ver. 3.0)
8
ELPIDA [ ELPIDA MEMORY ]
