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EDR2518ABSE-AEP 参数 Datasheet PDF下载

EDR2518ABSE-AEP图片预览
型号: EDR2518ABSE-AEP
PDF下载: 下载PDF文件 查看货源
内容描述: 288M位直接Rambus的DRAM [288M bits Direct Rambus DRAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 79 页 / 1101 K
品牌: ELPIDA [ ELPIDA MEMORY ]
 浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第7页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第8页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第9页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第10页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第12页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第13页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第14页浏览型号EDR2518ABSE-AEP的Datasheet PDF文件第15页  
EDR2518ABSE
Figure 2-1 Packet Formats
T
0
T
1
T
2
T
3
T
8
T
9
T
10
T
11
CTM/CFM
CTM/CFM
ROW2
ROW1
ROW0
DR4T DR2 BR0 BR3 RsvR R8
DR4F DR1 BR1 BR4 RsvR R7
DR3 DR0 BR2 RsvB AV=1
R6
R5
R4
R3
R2
R1
R0
ROW2
ROW1
ROW0
DR4T DR2 BR0 BR3
ROP10
ROP8ROP5 ROP2
DR4F DR1 BR1 BR4 ROP9ROP7ROP4ROP1
DR3 DR0 BR2 RsvB AV=0 ROP6ROP3ROP0
ROWA Packet
T
0
T
1
T
2
T
3
ROWR Packet
T
0
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
T
9
T
10
T
11
T
12
T
13
T
14
T
15
CTM/CFM
DC4
DC3
DC2 COP1
DC1 COP0
DC0 COP2
S=1
C6
C5
RsvB BC2
BC4 BC1
COP3 BC3 BC0
C4
C3
C2
C1
C0
CTM/CFM
ROW2
..ROW0
COL4
..COL0
DQA8..0
DQB8..0
ACT a0
PRER c0
COL4
COL3
COL2
COL1
COL0
t
PACKET
WR b1
MSK (b1)
PREX d0
COLC Packet
T
8
T
9
T
10
T
11
T
12
T
13
T
14
T
15
CTM/CFM
Note1
CTM/CFM
Note2
COL4
COL3
COL2
COL1
COL0
S=1 MA7 MA5 MA3 MA1
M=1 MA6 MA4 MA2 MA0
MB7 MB4 MB1
MB6 MB3 MB0
MB5 MB2
COL4
COL3
COL2
COL1
COL0
S=1 DX4 XOP4 RsvB BX1
M=0 DX3 XOP3 BX4 BX0
DX2 XOP2 BX3
DX1 XOP1 BX2
DX0 XOP0
COLM Packet
COLX Packet
Notes 1.
The COLM is associated with a previous COLC, and is aligned with the present COLC, indicated
by the Start bit (S=1) position.
2.
The COLX is aligned with the present COLC, indicates by the Start bit (S=1) position.
Preliminary Data Sheet
E0260E40 (Ver. 4.0)
11