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EDS2508ACTA 参数 Datasheet PDF下载

EDS2508ACTA图片预览
型号: EDS2508ACTA
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM [256M bits SDRAM]
分类和应用: 动态存储器
文件页数/大小: 51 页 / 553 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDS2504ACTA/08ACTA/16ACTA, EDS2504APTA/08APTA/16APTA
DC Characteristics 1 (TA = 0 to +70°C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V)
°
Parameter
/CAS latency
Operating current
Symbol
ICC1
ICC1
Standby current in power
down
Standby current in power
down (input signal stable)
Standby current in power
down (input signal stable)
(EDS2504AP/08AP/16AP)
(L-version)
Standby current in non
power down
Standby current in non
power down (input signal
stable)
Active standby current in
power down
Active standby current in
power down (input signal
stable)
Active standby current in
non power down
Active standby current in
non power down (input
signal stable)
Burst operating current
Refresh current
ICC2P
ICC2PS
Grade
-7A
-75
max.
×
4
130
110
3
2
×
8
130
110
3
2
×
16
135
115
3
2
Unit
mA
mA
mA
mA
Test condition
Burst length = 1
tRC = min.
Burst length = 1
tRC = min.
CKE = VIL, tCK = min.
CKE = VIL, tCK =
Notes
1, 2, 3
6
7
ICC2PS
-XXL
0.5
0.5
0.5
mA
CKE = VIL, tCK =
CKE, /CS = VIH,
tCK = min.
CKE = VIH, tCK =
∞,
/CS = VIH
CKE = VIL, tCK = min.
CKE = VIL, tCK =
CKE, /CS = VIH,
tCK = min.
CKE = VIH, tCK =
∞,
/CS = VIH
tCK = min., BL = 4
tRC = min.
tRC = min.
VIH
VDD
– 0.2V
VIL
0.2V
VIH
VDD
– 0.2V
VIL
0.2V
9
ICC2N
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
ICC5
ICC5
-7A
-75
20
9
4
3
30
15
130
250
220
3
-XXL
1
20
9
4
3
30
15
135
250
220
3
1
20
9
4
3
30
15
145
250
220
3
1
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
4
8
1, 2, 6
2, 7
1, 2, 4
2, 8
1, 2, 5
3
Self refresh current
ICC6
Self refresh current
(EDS2504AP/08AP/16AP) ICC6
(L-version)
9
Notes: 1. ICC depends on output load condition when the device is selected. ICC (max.) is specified at the output
open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CLK operating current.
7. After power down mode, no CLK operating current.
8. Input signals are VIH or VIL fixed.
9. This characteristic is guaranteed only for EDS2504AP/08AP/16AP (L-version).
Data Sheet E0110E30 (Ver. 3.0)
5