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EDS2532EGBH-6DTT-F 参数 Datasheet PDF下载

EDS2532EGBH-6DTT-F图片预览
型号: EDS2532EGBH-6DTT-F
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM WTR (宽温度范围) [256M bits SDRAM WTR (Wide Temperature Range)]
分类和应用: 动态存储器
文件页数/大小: 50 页 / 719 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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PRELIMINARY DATA SHEET
256M bits SDRAM
WTR (Wide Temperature Range)
EDS2532EGBH-TT (8M words
×
32 bits)
Specifications
Density: 256M bits
Organization
2M words
×
32 bits
×
4 banks
Package: 90-ball FBGA
Lead-free (RoHS compliant) and Halogen-free
Power supply: VDD, VDDQ
=
1.8V
±
0.1V
Clock frequency: 166MHz/133MHz (max.)
2KB page size
Row address: A0 to A11
Column address: A0 to A8
Four internal banks for concurrent operation
Interface: LVCMOS
Burst lengths (BL): 1, 2, 4, 8, full page
Burst type (BT):
Sequential (1, 2, 4, 8, full page)
Interleave (1, 2, 4, 8)
/CAS Latency (CL): 3
Precharge: auto precharge option for each burst
access
Driver strength: normal, 1/2, 1/4, 1/8
Refresh: auto-refresh, self-refresh
Refresh cycles: 4096 cycles/64ms
Average refresh period: 15.6µs
Operating ambient temperature range
TA = –20°C to +85°C
Pin Configurations
/xxx indicates active low signal.
90-ball FBGA
1
2
3
4
5
6
7
8
9
A
DQ26 DQ24 VSS
VDD DQ23 DQ21
VDDQ VSSQ DQ19
DQ22 DQ20 VDDQ
DQ17 DQ18 VDDQ
NC
A2
A10
NC
BA0
/CAS
VDD
DQ6
DQ1
DQ16 VSSQ
DQM2 VDD
A0
BA1
/CS
A1
A11
/RAS
B
DQ28 VDDQ VSSQ
C
VSSQ DQ27 DQ25
D
VSSQ DQ29 DQ30
E
VDDQ DQ31
NC
A3
A6
NC
A9
NC
VSS
F
VSS DQM3
G
A4
A5
A8
CKE
NC
H
A7
J
CLK
K
DQM1
/WE DQM0
DQ7 VSSQ
DQ5 VDDQ
DQ3 VDDQ
L
VDDQ DQ8
M
VSSQ DQ10 DQ9
N
VSSQ DQ12 DQ14
P
DQ11 VDDQ VSSQ
VDDQ VSSQ DQ4
VDD
DQ0
DQ2
R
DQ13 DQ15 VSS
Features
• ×32
organization
Single pulsed /RAS
Burst read/write operation and burst read/single write
operation capability
Byte control by DQM
Wide temperature range
TA =
−20°C
to +85°C
A0 to A11
BA0, BA1
DQ0 to DQ31
/CS
/RAS
/CAS
/WE
DQM0 to DQM3
CKE
CLK
VDD
VSS
VDDQ
VSSQ
NC
(Top view)
Address inputs
Bank select address
Data-input/output
Chip select
Row address strobe
Column address strobe
Write enable
DQ mask enable
Clock enable
Clock input
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
Document No. E1200E40 (Ver. 4.0)
Date Published December 2008 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida
Memory, Inc. 2007-2008