HM51W17805 Series
LP
EO
Description
Features
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•
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16 M EDO DRAM (2-Mword
×
8-bit)
2 k Refresh
E0155H10 (Ver. 1.0)
(Previous ADE-203-631D (Z))
Jun. 27, 2001
The HM51W 17805 is a C MOS dynamic R AM orga nized 2, 097,152-w ord
×
8-bit. It employs the most
adva nce d C MOS tec hnology for high per forma nce and low powe r. The HM51W 17805 off ers Extende d Da ta
Out (ED O) P age Mode as a high spee d ac ce ss mode. Multiplexe d addr ess input per mits the HM51W 17805 to
be packaged in standard 28-pin plastic SOJ and 28-pin TSOP.
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Single 3.3 V (±0.3 V)
•
Access time: 50 ns/60 ns/70 ns (max)
•
Power dissipation
Active mode: 396 mW/360 mW/324 mW (max)
Standby mode : 7.2 mW (max)
: 0.54 mW (max) (L-version)
EDO page mode capability
Long refresh period
2048 refresh cycles : 32 ms
: 128 ms (L-version)
4 variations of refresh
RAS-only
refresh
CAS-before-RAS
refresh
Hidden refresh
Self refresh (L-version)
Battery backup operation (L-version)
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
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