HM5264165F-75/A60/B60
HM5264805F-75/A60/B60
HM5264405F-75/A60/B60
EO
Description
Features
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64M LVTTL interface SDRAM
133 MHz/100 MHz
1-Mword
×
16-bit
×
4-bank/2-Mword
×
8-bit
×
4-bank
/4-Mword
×
4-bit
×
4-bank
PC/133, PC/100 SDRAM
The HM5264165F is a 64-Mbit SDRAM organized as 1048576-word
×
16-bit
×
4 bank. The HM5264805F
is a 64-Mbit SDRAM organized as 2097152-word
×
8-bit
×
4 bank. The HM5264405F is a 64-Mbit SDRAM
organized as 4194304-word
×
4-bit
×
4 bank. All inputs and outputs are referred to the rising edge of the
clock input. It is packaged in standard 54-pin plastic TSOP II.
3.3 V power supply
Clock frequency: 133 MHz/100 MHz (max)
LVTTL interface
Single pulsed
RAS
4 banks can operate simultaneously and independently
Burst read/write operation and burst read/single write operation capability
Programmable burst length: 1/2/4/8/full page
2 variations of burst sequence
Sequential (BL = 1/2/4/8/full page)
Interleave (BL = 1/2/4/8)
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
L
E0135H10 (Ver. 1.0)
(Previous ADE-203-940B (Z))
Apr. 25, 2001
Pr
od
uc
t
ELPIDA [ ELPIDA MEMORY ]
