EM39LV040
4M (512Kx8) Bits Flash Memory
SPECIFICATION
Sector Erase
The EM39LV040 offers Sector-Erase mode. The Sector-Erase operation allows the system
to erase the device on a sector-by-sector basis. The sector architecture is based on uniform
sector size of 4 KByte. The Sector-Erase operation is initiated by executing a six-byte
command sequence with Sector-Erase command (30H) and Sector Address (SA) in the last
bus cycle. The sector or block address is latched on the falling edge of the sixth WE# pulse,
while the command (30H) is latched on the rising edge of the sixth WE# pulse. The internal
Erase operation begins after the sixth WE# pulse. The End-of-Erase operation can be
determined by using either Data# Polling or Toggle Bit method. See Figures 7 for timing
waveforms. Any command issued during the Sector-Erase operation is ignored.
Data# Polling (DQ7)
When the EM39LV040 is in the internal Program operation, any attempt to read DQ7 will
produce the complement of the true data. Once the Program operation is completed, DQ7
will produce the true data. Note that even though DQ7 may have valid data immediately
following the completion of an internal Program operation, the remaining data outputs may still
be invalid (valid data on the entire data bus will appear in subsequent successive Read cycles
after an interval of 1 µs). During internal Erase operation, any attempt to read DQ7 will
produce a “0”. Once the internal Erase operation is completed, DQ7 will produce a “1”. The
Data# Polling is valid after the rising edge of fourth WE# (or CE#) pulse for Program operation.
For Sector-Erase or Chip-Erase, the Data# Polling is valid after the rising edge of sixth WE#
(or CE#) pulse. See Figure 4 for Data# Polling timing diagram and Figure 13 for the
corresponding flowchart.
Toggle Bit (DQ6)
During the internal Program or Erase operation, any consecutive attempts to read DQ6 will
produce alternating 1s and 0s, i.e., toggling between 1 and 0. When the internal Program or
Erase operation is completed, the DQ6 bit will stop toggling. The device is then ready for the
next operation. The Toggle Bit is valid after the rising edge of fourth WE# (or CE#) pulse for
Program operation. For Sector-Erase or Chip-Erase, the Toggle Bit is valid after the rising
edge of sixth WE# (or CE#) pulse. See Figure 5 for Toggle Bit timing diagram and Figure 13
for the corresponding flowchart.
Data Protection
The EM39LV040 provides both hardware and software features to protect the data from
inadvertent write.
This specification is subject to change without further notice. (07.22.2004 V1.0)
Page 6 of 21
EMC [ ELAN MICROELECTRONICS CORP ]
