EM73983
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
FUNCTION BLOCK DIAGRAM
RESET
minary
Preli
CLK LXIN LXOUT
Reset
Control
Clock
Generator
Timing
Generator
Clock Mode
Control
System Control
Data pointer
Interrupt
Control
Time
Base
Instruction Decoder
Instruction Register
ACC
Stack pointer
Stack
RAM
S
HR
LR
P0.0/WAKEUP0
P0.1/WAKEUP1
P0.2/WAKEUP2
P0.3/WAKEUP3
Data Bus
ALU
Flag
Z
C
ROM
Timer/Counter
(TA,TB)
PC
I/O Control
V1~V5
VA,VB
LCD Driver
Speech
synthesizer
COM0~COM7
SEG0~SEG39
BZ1
BZ2
PIN DESCRIPTIONS
Symbol
V
DD
,V
DD
2
Vss
RESET
Pin-type
Function
Power supply (+)
Power supply (-)
System reset input signal, low active
mask option :
none
pull-up
Capacitor connecting pin for internal high frequency oscillator.
Crystal connecting pin for low speed clock source.
Crystal connecting pin for low speed clock source.
4-bit input port with IDLE/STOP releasing function
mask option :
wakeup enable, pull-up
wakeup enable, none
wakeup disable, pull-up
wakeup disable, pull-down
wakeup disable, none
4-bit bidirection I/O port with high current source.
mask option :
open-drain
push-pull, high current PMOS
push-pull, low current PMOS
2-bit bidirection I/O port with external interrupt sources input and IDLE
/STOP releasing function
mask option :
wakeup enable, push-pull
wakeup disable, push-pull
wakeup disable, open-drain
2-bit bidirection I/O port with time/counter A,B external input and IDLE
/STOP releasing function
10.31.2000
2
RESET-A
CLK
LXIN
LXOUT
P0(0..3)/WAKEUP0..3
OSC-G
OSC-B
OSC-B
INPUT-B
P4(0..3)
I/O-N
P8.0(INT1)/WAKEUPA I/O-L
P8.2(INT0)/WAKEUPC
P8.1(TRGB)/WAKEUPB I/O-L
P8.3(TRGA)/WAKEUPD
* This specification are subject to be changed without notice.
P4.0
P4.1
P4.2
P4.3
P8.0(INT1)/WAKEUPA
P8.1(TRGB)/WAKEUPB
P8.2(INT0)/WAKEUPC
P8.3(TRGA)/WAKEUPD
EMC [ ELAN MICROELECTRONICS CORP ]
