EM73MA89B
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
y
iminar
Prel
PC 0
0
a
a
a
a
a
a
a
a
a
a
a
RET
Object code: 0100 1111
Condition: PC
←
STACK[SP]; SP + 1
PC
The return address stored in stack
RT I
Object code: 0100 1101
Condition : FLAG. PC
←
STACK[SP]; EI
←
1; SP + 1
PC
The return address stored in stack
(3) Interrupt acceptance operation:
When an interrupt is accepted, the original PC is pushed into stack and interrupt vector will be loaded into
PC. The interrupt vectors are as follows :
INT0
(External interrupt from P8.2)
PC 0
0
0
0
0
0
0
0
0
0
0
1
0
SPI
(speech end interrupt)
PC 0
0
0
0
0
0
0
0
0
0
1
0
0
TRGA
(Timer A overflow interrupt)
PC 0
0
0
0
0
0
0
0
0
0
1
1
0
TRGB
(Time B overflow interrupt)
PC 0
0
0
0
0
0
0
0
0 1
0
0 0
TBI
(Time base interrupt)
PC 0
0
0
0
0
0
0
0
0 1
0
1 0
INT1
(External interrupt from P8.0)
PC 0
(4) Reset operation:
PC 0
0
0
0
0
0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0 1
1
0 0
* This specification are subject to be changed without notice.
10.15.2002 (V1.3)
12
EMC [ ELAN MICROELECTRONICS CORP ]
