FUNCTION BLOCK DIAGRAM
VDD
RESET
XOUT XIN
y
iminar
Prel
LXOUT LXIN
EM73P968
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
SPI
Reset
Control
Clock
Generator
Clock
Generator
(slow)
System Control
Data pointer
Interrupt
Control
Time
Base
TEST
V1
V2
V3
V
RLC
Instruction Decoder
Instruction Register
ACC
Stack pointer
Stack
RAM
S
HR
PC
I/O Control
LCD
ADC
LR
Timing
Generator
Sleep Mode
Control
P15.0/P15.1/
WAKEUP
Data Bus
ALU
Flag
Z
C
Timer/Counter
(TA,TB)
ROM
P0/WAKEUP
P2 /WAKEUP
P4 /WAKEUP
P5 /WAKEUP
VADSS
VAD
Vref
(AIN 0~3)P6/WAKEUP
(AIN 4~7)P7/WAKEUP
COM0~COM3
SEG0~SEG43
P1/WAKEUP
P11/WAKEUP
P15.2/WAKEUP
P15.3/WAKEUP
P30/SEG(44~47)
PIN DESCRIPTIONS
Symbol
V
DD
V
SS
Vref
V
AD
V
ADSS
RESET
Pin-type
Function
Power supply (+)
Power supply (-)
ADC power (+)
ADC power (+)
ADC power (-)
RESET-A
System reset input signal, low active
mask option : none
pull-up
XIN/RC
OSC
OSC-A/OSC-H1 Crystal/RC clock source connecting pin
XOUT
OSC-A
Crystal connecting pin
LXIN
OSC-B/OSC-H2 Crystal/RC connecting pin for low speed clock source
LXOUT
OSC-B
Crystal connecting pin for low speed clock source
P0(0..3)/WAKEUP(0..3) INPUT-K
4-bit input port with IDLE/STOP releasing function
P0.0/ACLK : address counter clock for programming OTP.
P0.1/PGMB : program data to OTP cells for programming OTP.
P0.2/OEB : data output enable for programming OTP.
P0.3/DCLK : data in/out clock signal for programming OTP.
mask option 1 : wakeup disable
wakeup enable
mask option 2 :low current pull up
normal current pull up
high current pull up
none
8.14.2001
2
* This specification are subject to be changed without notice.
P31/SEG(48~51)
P8/WAKEUP
P17.0/COM4
VSS