EM785840/5841/5842
8-bit Micro-controller
IOC PAGE registers
Addr IOC PAGE0
IOC PAGE1
00
01
02
03
04
05
06 Port6 I/O control
Port6 switches
07 Port7 I/O control
Port7 pull high
08
09 Port9 I/O control
0A
0B
ADC control
0C
0D
Clock source (CN1)
Prescaler(CN1)
0E Interrupt mask
0F Interrupt mask
10
:
1F
20
:
3F
* IOC register are special registers. User can use instruction
“IOW” to write data or “IOR” to read data.
VII.2 Operational Register Detail Description
R0 (Indirect Addressing Register)
R0 is not a physically implemented register. It is used as indirect addressing pointer. Any instruction using R0
as register actually accesses data pointed by the RAM Select Register (R4).
Example:
Mov A, @0x20
;store a address at R4 for indirect addressing
Mov 0x04, A
Mov A, @0xAA
;write data 0xAA to R20 at bank0 through R0
Mov 0x00, A
R1 (TCC)
TCC data buffer. Increased by 16.384KHz or by the instruction cycle clock (controlled by CONT register).
Written and read by the program as any other register.
R2 (Program Counter)
The structure is depicted in Fig.3.
Generates 4k
×
13 external ROM addresses to the relative programming instruction codes.
"JMP" instruction allows the direct loading of the low 10 program counter bits.
"CALL" instruction loads the low 10 bits of the PC, PC+1, and then push into the stack.
"RET'' ("RETL k", "RETI") instruction loads the program counter with the contents at the top of stack.
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* This specification is subject to change without notice.
7
2004/11/10 V1.2
EMC [ ELAN MICROELECTRONICS CORP ]
