EM785840/5841/5842
8-bit Micro-controller
VI. Pin Descriptions
PIN
I/O
DESCRIPTION
POWER
AVDD
AVSS
CLOCK
XIN
POWER
POWER
Power
Ground
I
Input pin for 32.768 kHz oscillator
Output pin for 32.768 kHz oscillator
XOUT
PLLC
OSC
O
I
Phase loop lock capacitor, connect a capacitor 0.047u to 0.1u to the ground.
ERIC mode clock signal input. This pin is shared with PLLC.
Counter1 external CLK input. This pin is shared with P94.
Note the frequency of the input CLK must less than 1M Hz.
I
CIN
I
10-bit 8 channel A/D
VREF
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
PWM
PWM1
I (P66)
ADC external reference voltage input
I (P90)
I (P91)
I (P62)
I (P63)
I(P64)
I(P65)
I (P92)
I (P93)
ADC input channel 1. Shared with PORT90
ADC input channel 2. Shared with PORT91
ADC input channel 3. Shared with PORT62
ADC input channel 4. Shared with PORT63
ADC input channel 5. Shared with PORT64
ADC input channel 6. Shared with PORT65
ADC input channel 7. Shared with PORT92
ADC input channel 8. Shared with PORT93
O
O
Pulse width modulation output
This pin shared with PORTC1
Pulse width modulation output
This pin shared with PORTC2
PWM2
IO
P60 ~ P61
I/O
PORT60,1 can be INPUT or OUTPUT port each bit.. These two pins can be
used on ERIC and IRC modes.
P62 ~P65
P70
I/O
PORT6 can be INPUT or OUTPUT port each bit.
PORT70 can be INPUT or OUTPUT port each bit.
PORT71 is INPUT only.
I/O
P71
I
P73~P76
P90 ~ P97
PC1 ~ PC2
INT0
I/O
PORT7 can be INPUT or OUTPUT port each bit.
PORT9 can be INPUT or OUTPUT port each bit.
PORTC can be INPUT or OUTPUT port each bit.
Interrupt sources. Once PORT70 has a falling edge or rising edge signal
(controlled by CONT register), it will generate a interruption.
Interrupt sources which has the same interrupt flag. Any pin from PORT71
has a falling edge signal, it will generate a interruption.
Interrupt sources which has the same interrupt flag. Any pin from PORT73
has a falling edge signal, it will generate a interruption.
Low reset
I/O
I/O
(PORT70)
INT1
(PORT71)
PORT73
I
INT3
/RESET
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* This specification is subject to change without notice.
5
2004/11/10 V1.2