EM78P157N
8-Bit Microcontroller with OTP ROM
4
Function Description
OSCO
/RESET
OSCI
WDT timer
TCC
/INT
Oscillator/Timing
Control
Prescaler
IOCA
ROM
R2
Stack
RAM
Interrupt
Controller
Instruction
Register
R3
ALU
R4
R1(TCC)
Instruction
Decoder
ACC
DATA & CONTROL BUS
P60//INT
P61
P62
P63
P64
P65
P66
P67
IOC6
R6
I/O
PORT 6
IOC5
R5
I/O
PORT 5
P50
P51
P52
P53
Fig. 4-1 Function Block Diagram
4.1 Operational Registers
The following is the operational registers’ data memory configuration.
Address
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
︰
3F
R0
R1
R2
R3
R4
R5
R6
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
RF
R PAGE Registers
(IAR)
(TCC)
(PC)
(Status)
(RSR)
(Port5)
(Port6)
Reserve
CONT
Reserve
Reserve
Reserve
IOC5
IOC6
Reserve
Reserve
Reserve
IOCA
IOCB
IOCC
IOCD
IOCE
IOCF
IOC PAGE Registers
(Control Register)
(I/O Port Control Register)
(I/O Port Control Register)
(Interrupt Status)
(Prescaler Control Register)
(Pull-down Register)
(Open-drain Control)
(Pull-high Control Register)
(WDT Control Register)
(Interrupt Mask Register)
General Registers
Product Specification (V1.0) 09.22.2005
(This specification is subject to change without further notice)
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5
EMC [ ELAN MICROELECTRONICS CORP ]
