EM78P173N
8-Bit Microcontroller with OTP ROM
6.1.9 Bank 1 R5 (TBHP: Table Point Register for Instruction TBRD)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MLB
-
-
-
-
-
RBit9
RBit8
Bit 7 (MLB): Chooses the MSB or LSB machine code to move into the register.
The machine code is pointed by TBLP and TBHP register.
Bits 6 ~ 2: Not used. Set to “0” at all time.
Bits 1 ~ 0: These are the most 2 significant bits of address for program code
6.1.10 Bank 1 R6 (TBLP: Table Point Register for Instruction TBRD)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RBit7
RBit6
RBit5
RBit4
RBit3
RBit2
RBit1
RBit0
Bits 7 ~ 0: These are the least 8 significant bits of address for program code.
6.1.11 Bank 1 RE (LVD Interrupt and Wake-up Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LVDIE
LVDEN
LVD1
LVD0
-
-
-
EXWE
Bit 7 (LVDIE): Low voltage detector interrupt enable bit
0: Disable the low voltage detector interrupt
1: Enable the low voltage detector interrupt
Bit 6 (LVDEN): Low voltage detector enable bit
0: Disable Low voltage detector function
1: Enable Low voltage detector function
Bits 5 ~ 4: Low voltage detector level bits
LVDEN
LVD1, LVD0
LVD Voltage Interrupt Level
Vdd ≤ 2.2V
/LVD
0
1
0
1
0
1
0
1
1
1
11
Vdd > 2.2V
Vdd ≤ 3.3V
1
1
10
01
Vdd > 3.3V
Vdd ≤ 4.0V
Vdd > 4.0V
Vdd ≤ 4.5V
1
0
00
Vdd > 4.5V
N/A
××
NOTE
IF Vdd has crossover at LVD voltage in interrupt level as VDD varies, LVD interrupt
will occur.
10 •
Product Specification (V1.0) 04.20.2010
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
