EM78P451S
8-Bit Microcontroller with OTP ROM
4
FUNCTION DESCRIPTION
WDT Timer
WDT
Time-out
PC
STACK 1
STACK 2
STACK 3
Prescaler
Oscillator/
Timming
Control
/ INT
ROM
STACK 4
STACK 5
R1(TCC)
Interrupt
Control
Instruction
Register
ALU
RAM
Instruction
Decoder
R3
R4
ACC
TMR1
Sleep
&
Wake Up
Control
DATA & CONTROL BUS
IOC5
R5
IOC6
R6
IOC7
R7
IOC8
R8
IOC9
R9
SPI
ENGIN
PPPPPPPP
55555555
01234567
PPPPPPPP
66666666
01234567
P
7
0
P
7
1
P
7
2
PPPPPPPP
88888888
01234567
P PPP
9 9 9 9
0 1 2 3
/ /
SS
DD
I O
P
9
4
/
S
C
K
P
5
5
/
/
S
S
Fig. 2 Functional Block Diagram
4.1 Operational Registers
4.1.1 R0 (Indirect Address Register)
R0 is not a physically implemented register. It is used as an indirect addressing
pointer. Any instruction using R0 as register actually accesses data pointed by the
RAM Select Register (R4).
4.1.2 R1 (TCC)
Increased by the instruction cycle clock.
Written and read by program as any other register.
4.1.3 R2 (Program Counter) & Stack
R2 and the hardware stacks are 12 bits wide.
The structure is depicted in Fig. 3.
Generates 4K
×
13 on-chip ROM addresses to the relative programming instruction
codes. One program page is 1024 words long.
All the R2 bits are set to "1"s as a RESET condition occurs.
4
•
Product Specification (V1.0) 06.01.2004
(This specification is subject to change without further notice)