EM83040A
LCD CONTROLLER
PIN DESCRIPTIONS
Symbol
VDD
GND
VSS3
VSS2
MAIN
I/O
Power
power
power
Power
I
minary
Preli
Function
Ground
EN=0 and MAIN=1, 3*regulator output, EN=1 ,VSS3=VDD
EN=0 and MAIN=1, 2*regulator output, EN=1, VSS2=VDD
Master or slave control signal.
MAIN=1 ,master unit
MAIN=0 , slave unit
This pin control whole chip power. This chip will work when this pin is
connectted to ground. And whole chip will disable when connect to VDD voltage.
EN=0 and MAIN=1 the chip will generate VSS2, VSS3, LOAD signal and internal
RC clock.
EN=1, standby mode
Mode select
Mode select
RAM read and write control signal.
1 => can not read and write. 0=> can read and write.
RAM data select signal
1=> RAM Data , 0=>Address
RAM write signal, low write
RAM read signal, low read
RAM data or address bus
LCD load signal between one COMMON signal to another .
MAIN=1 , the master unit will output LOAD signal.
MAIN=0 , the slave will accept the signal from master unit.
regulator output, connect a capacitor to ground.
Coupling capacitor
Coupling capacitor
Reference voltage input ,highest V1..lowest V5
LCD waveform output
EN
I
M1
M0
RAMEN
RAMADS
RAMW
RAMR
RAMD3~
RAMD0
LOAD
I
I
I/O
VREG
CA
CB
V1~V5
O1~O80
power
I
I
I
O
FUNCTION DESCRIPTIONS
(1)User can use MAIN pin to chose master unit or slave unit.
MAIN
1
0
Unit
MASTER
SLAVE
Function
Generate these signals
Load, VSS2, VSS3, Internal RC clock
Accept these signals
Load, V1, V2, V3, V4, V5
(2)User can use M1,M2 to chose four modes. As followed
MASTER
Mode1
Mode2
Mode3
Mode4
MAIN
1
1
1
1
M1
0
0
1
1
M0
0
1
0
1
Segment
Reserved for test
O(32:1)=S(32:1)
O(48;1)=S(48:1)
Common
O(80:1)=C(80:1)
O(80:33)=C(48:1)
O(80:49)=C(32:1)
Bias
1/9
1/7
1/5
5.31.2001
3
* This specification are subject to be changed without notice.
EMC [ ELAN MICROELECTRONICS CORP ]
