EM83053DH
PC Micro-controller
Symbol
P61
P62
P63
P64
P65
P66
P67
CLK
DATA
V DD
OSCO
R_OSCI
I/O
I
I
I
I
I
I
I
I/O
I/O
I
O
I
Function
Row 1 Input scan line, internal pull high ( 17
Ω
)
Row 2 Input scan line, internal pull high ( 17
Ω
)
Row 3 Input scan line, internal pull high ( 17
Ω
)
Row 4 Input scan line, internal pull high ( 17
Ω
)
Row 5 Input scan line, internal pull high ( 17
Ω
)
Row 6 Input scan line, internal pull high ( 17
Ω
)
Row 7 Input scan line, internal pull high ( 17
Ω
)
CLOCK line for IBM communication , internal pull high ( 2.2
Ω
)
DATA line for IBM communication , internal pull high ( 2.2
Ω
)
+5V Power Supply
CLOCK output
Connect 51K OHM resistor for 1.8432 MHz oscillation
6
Function Descriptions
6.1 Keyboard Buffer
The keyboard will buffer 16 bytes in a first-in-first-out order when the system is able to
receive scan codes from the keyboard. The response codes and repeated codes will
not be buffered. If keystrokes generate a multiple-byte sequence, the entire sequence
must fit into the buffer or the keystroke is discarded and a buffer-overrun condition
occurs.
6.2 Power-on Reset and Self Test
The duration of the keyboard Power-on-Reset(POR) should be within 150 milliseconds
and 2 seconds after the power is applied to the keyboard.
After executing POR , the keyboard executes a self test. The LEDs are turned on at the
beginning and off at the end of the self test. The self test takes a minimum 300
milliseconds and a maximum 500 milliseconds. If the self test is successful, a
completion code AA hex is sent to the system and the keyboard starts scanning. If the
self test fails, and error code is sent, the keyboard is disabled and waits for a command
from the system. The completion codes are sent between 450 milliseconds and 2.5
seconds after POR, and between 300 and 500 milliseconds after a RESET command is
acknowledged.
6.3 Keyboard Data Output
When the keyboard is ready to send data to the system, it first checks clock and data
lines. If either one is in the low state, data is stored in the keyboard buffer. If both are
in the high state, keyboard starts clocking data out. Data will be valid before the trailing
edge and after the leading edge of the clock pulse. During the transmission the
keyboard checks the clock line at least every 60 microseconds . If the system lowers
Product Specification (V1.0) 03.28.2003
(This specification is subject to change without further notice)
•
3
EMC [ ELAN MICROELECTRONICS CORP ]
