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EM84502BM 参数 Datasheet PDF下载

EM84502BM图片预览
型号: EM84502BM
PDF下载: 下载PDF文件 查看货源
内容描述: PS / 2鼠标编码器 [PS/2 MOUSE ENCODER]
分类和应用: 编码器
文件页数/大小: 12 页 / 89 K
品牌: EMC [ ELAN MICROELECTRONICS CORP ]
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PS/2 MOUSE CONTROLLER
PS/2 MOUSE CONTROLLER
EM84502
EM84502
GENERAL DESCRIPTION
The EM84502 Mouse Controller is specially designed to control PS/2 mouse device.This single chip can
interface three key-switches and four photo-couples direct to 8042. EM84502 can receive command and echo
status or data format which are compatible with IBM PS/2 mode mouse. Key debouncing circuit is provided
to prevent false entry and improve the accuracy.
In the conventional mouse, a great number of noises are generated when the grid is partially closed or opened.
These noise are usually mistaken for movement signals by conventional mouse controller and the cursor of the
dispaly screen is thus moved frequently up and down or back and forth. This will consumes a great amount of
energy.The EM84502 PS/2 mouse controller provides noise immunity circuits to eliminate these noise
in order to reduce energy consumption.
FEATURES
Being compatiable with PS/2 mouse mode.
Built-in noise immunity circuit.
Low power dissipation.
RC oscillation.
Three key-switches and four photo-couples inputs.
Both key-press and key-release debounce interval 12 ms.
Through three key-switches input, EM84502 can exert seven different output.
The motion detector of the EM84502 could sense 8 m/sec maximun with 200 DPI wheels.
APPLICATIONS
Optical mouse or pen-mouse.
Mechanical mouse or pen-mouse.
Optomechanical mouse or pen-mouse.
Mechanical track ball.
Optomechanical track ball.
PIN ASSIGNMENT
EM84502AP
V
DD
OP
OSC.OUT
CLK
DATA
VSS
R
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OSCR
Y2
Y1
X2
X1
L
M
EM84502AM
V
DD
OP
OSC.OUT
CLK
DATA
VSS
R
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OSCR
Y2
Y1
X2
X1
L
M
EM84502BP
V
DD
OP
NC
NC
OSC.OUT
CLK
DATA
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OSCR
Y2
Y1
X2
X1
L
M
R
EM84502BM*
V
DD
OP
NC
NC
OSC.OUT
CLK
DATA
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OSCR
Y2
Y1
X2
X1
L
M
R
* (Under developed)
* This specification are subject to be changed without notice.
6.18.1998
1