PTHxx050Y
3.3 / 5 / 12 Vin Single Ou t put
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module
4
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
NEW Product
0.140
(3.55)
0.870 (22.10)
0.060
0.060
(1.52)
(1.52)
ø
0.040 (1.02)
0.750 (19.06)
6 Places
1
2
3
4
6
0.125
(3.18)
0.495
(12.57)
0.375
(9.52)
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
0.125
(3.18)
0.125
(3.18)
5
0.070 (1.78)
(Standoff Shoulder)
TOP VIEW
Host Board
PIN CONNECTIONS
0.335 (8.50)
MAX.
PIN NO.
FUNCTION
Ground
VREF
SIDE VIEW
1
2
3
4
5
6
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
V
in
Figure 5 - Plated Through-Hole Mechanical Drawing
Inhibit*
N/C
VTT
*Denotes negative logic:
Open = Normal operation
Ground = Function active
0.870 (22.10)
0.060
(1.52)
*After solder reflow
on customer board
0.335 (8.50)
max.*
0.060
(1.52)
0.750 (19.06)
6
1
2
3
4
0.125
(3.18)
Solder Ball
ø
0.040 (1.02)
0.495
(12.57)
6 Places
0.125
(3.18)
0.375
(9.52)
Lowest Component
0.010 min. (0.25)
0.125
(3.18)
Bottom side Clearance
5
SIDE VIEW
Host Board
TOP VIEW
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
Figure 6 - Surface-Mount Mechanical Drawing
Datasheet © Artesyn Technologies
® 2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
Please consult our website for the following items: ꢀ Application Note
www.a rte s yn.com
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
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