EM620FV8B Series
Low Power, 256Kx8 SRAM
256K x8 Bit Low Power and Low Voltage CMOS Static RAM
FEATURES
- Process Technology : 0.15µm Full CMOS
- Organization :256K x8
29
56
- Power Supply Voltage
=> EM620FV8B : 2.7~3.6V
- Low Data Retention Voltage : 1.5V
- Three state output and TTL Compatible
- Packaged product designed for 45/55/70ns
EM620FV8B (Dual C/S)
GENERAL PHYSICAL SPECIFICATIONS
- Backside die surface of polished bare silicon
- Typical Die Thickness = 725um +/-15um
- Typical top-level metallization :
+
(0.0)
=> Metal (Ti/AlCu/TiN/ARC SiON/SiO2) : 5.2K Angstroms
- Topside Passivation :
=> Passivation (HDP/pNIT/PIQ) : 5.4K Angstroms
- Wafer diameter : 8 inch
EMLSI LOGO
1
28
OPTIONS
y
- C1/W1 : DC Probed Die/Wafer @ Hot Temp
- C2/W2 : DC/AC Probed Die/Wafer @ Hot Temp
x
Pre-charge Circuit
A
0
A
1
V
CC
PAD DESCRIPTIONS
V
SS
A
A
A
A
A
A
A
A
2
3
4
5
6
7
8
9
Memory Array
1024 x 2048
Name
Function
Name
Vcc
Vss
Function
CS1,CS2
OE
Chip select inputs
Output Enable input
Write Enable input
Address Inputs
Power Supply
Ground
WE
NC
No Connection
Data
Cont
I/O0 ~ I/O7
I/O Circuit
A0~A17
I/O0~I/O7
Column Select
Data Inputs/Outputs
A
A
A
A
A
A
A
13 14 15
16
A
11
10
12
17
WE
OE
Control Logic
CS1
CS2
BONDING INSTRUCTIONS
The 2M full CMOS SRAM die has total 56pads. Refer to the bond pad location and identification table for X, Y coordinates.
EMLSI recommends using a bond wire on back side of die onto Vss bond pad for improved noise immunity.
2
EMLSI [ Emerging Memory & Logic Solutions Inc ]
