EM620FV8B Series
Low Power, 256Kx8 SRAM
256K x8 Bit Low Power and Low Voltage CMOS Static RAM
FEATURES
- Process Technology : 0.15µm Full CMOS
-
Organization :256K x8
-
Power Supply Voltage
=> EM620FV8B : 2.7~3.6V
-
Low Data Retention Voltage : 1.5V
-
Three state output and TTL Compatible
-
Packaged product designed for 45/55/70ns
GENERAL PHYSICAL SPECIFICATIONS
-
Backside die surface of polished bare silicon
-
Typical Die Thickness = 725um +/-15um
-
Typical top-level metallization :
=> Metal (Ti/AlCu/TiN/ARC SiON/SiO2) : 5.2K Angstroms
-
Topside Passivation :
=> Passivation (HDP/pNIT/PIQ) : 5.4K Angstroms
-
Wafer diameter : 8 inch
OPTIONS
- C1/W1 : DC Probed Die/Wafer @ Hot Temp
- C2/W2 : DC/AC Probed Die/Wafer @ Hot Temp
1
56
29
EM620FV8B (Dual C/S)
+
(0.0)
EMLSI LOGO
28
y
x
Pre-charge Circuit
PAD DESCRIPTIONS
Name
CS1,CS2
OE
WE
A0~A17
I/O0~I/O7
Function
Chip select inputs
Output Enable input
Write Enable input
Address Inputs
Data Inputs/Outputs
Name
Vcc
Vss
NC
Function
Power Supply
Ground
No Connection
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
V
CC
Row Select
V
SS
Memory Array
1024 x 2048
I/O0 ~ I/O7
Data
Cont
I/O Circuit
Column Select
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
WE
OE
CS1
CS2
Control Logic
BONDING INSTRUCTIONS
The 2M full CMOS SRAM die has total 56pads. Refer to the bond pad location and identification table for X, Y coordinates.
EMLSI recommends using a bond wire on back side of die onto Vss bond pad for improved noise immunity.
2