merging Memory & Logic Solutions Inc.
DATA RETENTION CHARACTERISTICS
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data Retention Time
Operation Recovery Time
NOTES
EM620FV8AT Series
Low Power, 256Kx8 SRAM
Symbol
V
DR
I
DR
t
SDR
t
RDR
Test Condition
I
SB1
Test Condition
(Chip Disabled)
1)
Min
1.5
-
0
Typ
-
-
-
-
Max
3.6
5
-
Unit
V
µA
V
CC
=1.5V, I
SB1
Test Condition
(Chip Disabled)
1)
See data retention wave form
ns
t
RC
-
1. See the I
S B 1
measurement condition of datasheet page 4.
DATA RETENTION WAVE FORM
CS
1
Controlled
V
cc
2.7V
t
SDR
Data Retention Mode
t
RDR
2.2V
V
DR
CS
1
GND
CS
1
> Vcc-0.2V
CS
2
Controlled
V
cc
2.7V
CS
2
t
SDR
Data Retention Mode
t
RDR
V
DR
0.4V
CS
2
< 0.2V
GND
9
Rev 0.2