EM4069
EM4169
Timing Characteristics
V
DD
= 3.0 V, V
SS
= 0 V, f
COIL1
= 125 kHz square wave, V
COIL1
= 5V, T
OP
= 25°C, unless otherwise specified
Parameter
Option : 64 RF periods per bit
Read bit period
EEPROM write time
Synchronization pattern phase 1
Synchronization pattern phase 2
Synchronization pattern phase 3
Option : 32 RF periods per bit
Read bit period
EEPROM write time
Synchronization pattern phase 1
Synchronization pattern phase 2
Synchronization pattern phase 3
Symbol
t
RDB
t
Wee
t
S1
t
S2
t
S3
Condition
Min.
Typ.
64
Max.
Unit
RF periods
ms
ms
ms
ms
20
4.1
1.5
1.5
5.0
2.0
4.0
t
RDB
t
Wee
t
S1
t
S2
t
S3
32
20
2.1
0.8
0.8
2.5
1.0
2.0
RF periods
ms
ms
ms
ms
RF periods represent periods of the carrier frequency emitted by the transceiver unit.
See figure 12 for Synchronization pattern phases.
Due to amplitude modulation of the coil-signal, the clock-extractor may miss clocks or add spurious clocks close to
the edges of the RF-envelope. This desynchronization will not be larger than
±
3 clocks per bit and must be taken into
account when developing reader software.
Block Diagram
Clock
Extractor
Data
Extractor
Sequencer
EEPROM
Modulator
VDD
COIL1
C
R
VSS
VSS
Control
Logic
Power
Supply
C
buf
Power on
Reset
Reset
ROM
Fig. 3
Copyright
2003, EM Microelectronic-Marin SA
3
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EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
