EM4069
EM4169
The bit pattern of the Write configuration word command is
compatible to Write Word command:
1101 0011 [8 bits protecting 8 words] [8 bits don’t care]
[8 bit CRC]
8 bits protecting 8 words:
Bit first sent in is protecting word 0, the second bit protects
word 1 and so on.
8 bits don’t care:
Any 8-bit pattern, all 0 pattern is not suggested for power
supply reasons.
CRC has to be correct including also don’t care bits.
Example of Write Configuration Word command:
D3 02 55 2F
(hex)
The above command (1101 0011) will protect word 6 (0000
0010) from being written.
in
Sync. wcw
When the synchronization pattern of modulation on
magnetic field is detected (Command Envelope) the
EM4069 waits for a Start Bit (SB).
If the start bit is detected before t
S3
time-out is expired, the
Command Processing mode is entered.
Eight command bits are serially entered. After the last bit
was shifted, the 8-bit pattern is compared to one of the 5
possible commands. In the case one of the commands is
recognized the appropriate action is performed otherwise
the IC returns in Read mode.
Detection of Command Envelope
The Peak Detector performs the measurement once every
bit period. The Peak Detector circuit compares the peak
value of voltage on the coil to the internal voltage
reference. The result of comparison is one bit of
information, which tells to Control Logic whether the field is
strong (HIGH field) or weak (LOW field).
The Peak Detector circuit has a built-in hysteresis of
typically 100mV which prevents unwanted Envelope
detection in field strength which is at the level of the
Detector threshold.
out
Read
Read
Detection of Start Bit (SB) and Command Word
After the Synchronization pattern Envelope was detected,
the EM4069 is sampling the incoming signal at a T
RDB
/8
rate. The start bit is accepted as valid when three
consecutive samples are LOW.
Duration of start bit (version 64 clocks/bit) and following
command bits are expected to be 512
µs
(same as one bit
period in read mode). In the version 32 clocks/bit, the
duration is 256
µs
When the start bit is detected, the Control Logic starts
switching Modulator load OFF and ON (First half of bit
period OFF and second half of bit period ON) to assure
enough power for operation of the IC. Samples of incoming
bits are taken during the time the modulator load is ON
(connected).
The command, address, data and CRC bits are sent in non
coded form (NRZ), reader induced high field (non
modulated) corresponds to logic one, low field (modulated)
to logic zero.
t
Wee
1ms
Fig. 11
If later on, word 1 has to be protected, the protection bit of
already protected word 6 has to be set to logic 1 again. The
new command will have to be sent with the following
protection bits: 0100 0010.
Read Configuration word Command
To enter this command the IC has to be in default mode
(read EEPROM bits). After execution of this command the
IC will cyclically read 128 bits.
16 of them will represent the configuration word the rest is
0. It is suggested that don’t care bits of configuration word
are programmed with some pattern which will be easy to
recognize during read out.
Command Timing for 8-bit command
While IC is in Read mode it is sampling the peak level of
coil voltage (during the time modulator switch is ON) once
every bit period. The peak to peak value is compared with
an internal reference in order to get a one-bit information
(high field or low field). The measured level is compared
with previous samples in order to detect whether there is a
reader-induced modulation present on the magnetic field.
Commands are accepted in the range where normal field
(100% strength) is higher than internal reference
(considered as high field) and modulated field is lower than
internal reference (considered as low field). An 65%
modulation on the reader signal is proposed (high field
100%, low field 20%).
Copyright
2003, EM Microelectronic-Marin SA
9
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EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
