R
EM4150
EM4350
Standard Read Mode
After a Power-On Reset and upon completion of a
command, the chip will execute the Standard Read
Mode, in which it will send data continuously, word by
word from the memory section defined between the First
Word Read (FWR) and Last Word Read (LWR). When
the last word is output, the chip will continue with the first
word until the transceiver sends a request. If FWR and
LWR are the same, the same word will be sent
repetitively. The Listen Window (LIW) is generated
before each word to check if the transceiver is sending
data. The LIW has a duration of 320 (160 opt 32) periods
of the RF field. FWR and LWR have to be programmed
as valid addresses (FWR
≤
LWR and
≤
33).
The words sent by the EM4150 comprise 32 data bits
and parity bits. The parity bits are not stored in the
EEPROM, but generated while the message is sent as
described below. The parity is even for rows and
columns, meaning that the total number of "1's" is even
(including the parity bit).
Receive Mode
To activate the Receive Mode, the Transceiver sends to
the chip the RM pattern (while in the modulated phase of
a Listen Window LIW). The EM4150 will stop sending
data upon reception of a valid RM. The chip then expects
a command. The RM pattern consists of 2 bits "0" sent
by the transceiver. The first bit "0" transmitted is to be
detected during the 64 (32 opt 32) periods where the
modulation is "ON" in LIW.
OUTPUT
WORD n
LIW
INPUT
RM
COMMAND
RM : Two Consecutive bits set to logic "0"
Fig. 9
Commands
The commands are composed of nine bits : eight data
bits and one even parity bit (total amount of "ones" is
even including the parity bit).
COMMAND BITS
00000001 1
00010001 0
00010010 0
FUNCTION
LOGIN
WRITE PASSWORD
WRITE WORD
SELECTIVE READ MODE
RESET
Word Organisation (Words 0 to 32)
First bit output
Data
Row Even Parity
D0
D8
D16
D24
PC0
D1
D9
D17
D25
PC1
D2
D10
D18
D26
PC2
D3
D11
D19
D27
PC3
D4
D12
D20
D28
PC4
D5
D13
D21
D29
PC5
D6
D14
D22
D30
PC6
D7
D15
D23
D31
PC7
P0
P1
P2
P3
0
Column Even Parity
Last bit output
logic "0"
Fig. 7a
00001010 0
10000000 1
When a word is read protected, the output will consist of
45 bits set to logic "0". The password has to be used to
output correctly a read protected memory area.
Word Organisation (Word 33)
C0
ID2
R0
CK0
PC0
C1
C2
ID3 ID4
R1
R2
CK1 CK2
PC1 PC2
C3
C4
ID5 ID6
R3
R4
CK3 CK4
PC3 PC4
C5 ID0
ID7 ID8
R5
R6
CK5 CK6
PC5 PC6
ID1
ID9
R7
CK7
PC7
P0
P1
P2
P3
0
First bit
Received
Parity bit
Fig. 10
C0 - C5
: P4150 Code set to Hexadecimal 32
ID0 - ID9
: Version Code
R0 - R7 / CK0 - CK7 : EM reserved, and Check bits
Selective Read Mode
The Selective Read Mode is used to read other data than
that defined between FWR and LWR. To enter Selective
Read Mode, the Transceiver has to send during LIW a
Receive mode pattern (RM) to turn the EM4150 in
Receive Mode. Then the Selective Read Mode
Command is sent by the transceiver followed by the First
and Last addresses to be read. The FWR and LWR are
then replaced by the new addresses and the chip is
operating in the same way as the Standard Read Mode.
The control word is not modified by this command, and
the next standard read mode operation will work with
original FWR and LWR (Selected area is read once and
then the chip returns to Standard Read Mode).
To read words which are Read Protected, a Login
command has to be sent by the transceiver prior to the
Selective Read command. The Login command is to be
used only once for all subsequent commands requiring a
password.
Fig. 7b
Read Sequence
POR
INIT
OUTPUT
LIW LIW
FWR
LIW FWR+1
LWR LIW LIW
FWR
LIW
LIW
D0-D7
P0 D8-D15
P1 D16-D23 P2 D24-D31 P3 PC0-PC7
"0"
T0 periods :
32 32
128
16 16
64
1 bit - 64 T0 periods (Opt64)
32 T0 periods (Opt32)
64
32
64
32
(Opt64)
(Opt32)
Data
Coded Data
T0 = Period of RF carrier frequency
Fig. 8
Copyright
©
2004, EM Microelectronic-Marin SA
5
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EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
