EM6603
10 Supply Voltage Level Detector
(SVLD)
The EM6603 has a software configurable built-in supply voltage level detector. Three levels can be defined
between VDDmin + 100mV and VDDmax - 600mV in steps of 100mV. During SLEEP mode this function is
disabled.
The required voltage compare level is selected by writing the bits
VLC1
and
VLC2
in the
SVLD
control register
which also activates the compare measurement. Since the measurement is not immediate the busy flag
remains high during the measurement and is automatically cleared low when the measurement is finished. The
result is indicated by inspection of the
VLDR
flag. If the result is 0 then the voltage level is higher than the
selected compare level. And if 1 is lower than the compare level. The result
VLDR
of the last measurement
remains until the new one is finished. The new result overwrites the previous one.
Table 32. SVLD level selection
During the SVLD operation power consumption increases
by approximately 3µA for 3.9msec. The measurement
internally starts with the rising 256Hz edge following the
SVLD test command. The additional SVLD consumption
stops after the falling edge of the 256Hz internal clock.
Table 32 lists the possible voltage levels
Evaluation voltage
not active
VL1 (low level)
VL2
VL3 (high level)
VLC1
0
0
1
1
VLC0
0
1
0
1
10.1 SVLD register
Table 33.SVLD control register - SVLD
Bit
3
2
1
0
Name
VLDR
busy
VLC1
VLC0
Reset
0
0
0
0
R/W
R
R
R/W
R/W
Description
SVLD result (0=higher 1=lower)
measurement in progress
SVLD level control 1
SVLD level control 0
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
20
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EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
