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EM6621 参数 Datasheet PDF下载

EM6621图片预览
型号: EM6621
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗微控制器的4x20 LCD驱动 [Ultra Low Power Microcontroller with 4x20 LCD Driver]
分类和应用: 微控制器驱动
文件页数/大小: 69 页 / 746 K
品牌: EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
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EM6621
11. Supply Voltage Level Detector
The EM6621 has a built-in Supply Voltage Level Detector (SVLD) circuitry, such that the CPU can compare the
supply voltage against a pre-selected value. During sleep mode this function is inhibited.
The CPU activates the supply voltage level
Figure 32. SVLD Timing Diagram
detector by writing
VldStart
= 1 in the register
SVLD > VBAT
SVLD < VBAT
RegVldCntl.
The actual measurement starts on
VBAT =V
DD
the next Ck[9] rising edge and lasts during the
Compare Level
Ck[9] high period (2 ms at 32 KHz). The busy
flag
VldBusy
stays high from
VldStart
set until
Ck[9] (256 Hz)
the measurement is finished. The worst case
CPU starts
CPU starts
time until the result is available is 1.5 Ck[9]
measure
measure
prescaler clock periods (32 KHz -> 6 ms). The
Busy Flag
detection level must be defined in register
RegVldLevel
before the
VldStart
bit is set.
Measure
During the actual measurement (2 ms) the
0
1
device will draw an additional 5 µA of I
VDD
Result
current. After the end of the measure the result
Read Result
is available by inspection of the bit
VldResult.
If the result is read 0, then the power supply
voltage was greater than the detection level value. If read 1, the power supply voltage was lower than the
detection level value. During each read while
Busy=1
the
VldResult
is not guaranteed.
11.1 SVLD Register
Table 11.1.1 Register RegVldCntl
Bit
Name
Reset
R/W
3
VldResult
0
R*
2
VldStart
0
W
2
VldBusy
0
R
1
NoOscWD
0
R/W
0
NoLogicWD
0
R/W
R*; Read value while VLDBusy=1 is not guaranteed.
Table 11.1.2 Register RegVldLevel (Detection Level Value)
Bit
3
2
1
0
Name
--
VldLevel2
VldLevel1
VldLevel0
Reset
x
0
0
0
R/W
--
R/W
R/W
R/W
Description
not active
Vld level selection
Vld level selection
Vld level selection
Description
Vld result flag
Vld start
Vld busy flag
No Oscillator watchdog
No logic watchdog
Table 11.1.3 Voltage Level Detector Value Selecting
Level1
Level2
Level3
Level4
Level5
Level6
Level7
Level8
VldLevel2
0
0
0
0
1
1
1
1
VldLevel1
0
0
1
1
0
0
1
1
VldLevel0
0
1
0
1
0
1
0
1
Typical voltage level
4.0
3.0
2.4
2.0
1.75
1.5
1.35
1,20
03/02 REV. D/444
Copyright
2002, EM Microelectronic-Marin SA
43
www.emmicroelectronic.com