EM6621
15. Peripheral Memory Map
Reset values are valid after power up or after every system reset.
Register
Name
Add
Hex
Add
Dec.
Reset
Value
b’3210
Read Bits
Write Bits
Remarks
Read / Write Bits
0: Data0
1: Data1
2: Data2
3: Data3
Normal addressable
Ram 64x4 bit
...
0: Data0
1: Data1
2: Data2
3: Data3
Normal addressable
Ram 64x4 bit
Ram1_0
00
0
xxxx
...
Ram1_63
...
3F
...
63
...
xxxx
Ram2_0
40
64
xxxx
0: Data0
1: Data1
2: Data2
3: Data3
16 nibbles addressable over
index register
on add ’H70
...
Ram2_3
...
43
...
67
...
xxxx
0: Data0
1: Data1
2: Data2
3: Data3
16 nibbles addressable over
index register
on add ’H70
LCD_1
LCD_2
LCD_3
44
45
46
68
69
70
xxxx
xxxx
xxxx
Connections are user definable.
See LCD section
Connections are user definable.
See LCD section
Connections are user definable.
See LCD section
16 nibbles addressable over
index register on add ’H70
16 nibbles addressable over
index register on add ’H70
The 8 lower nibbles are
addressable over the index
register on add ’H70.
The 8 higher Nibbles are not
used and not implemented
---
...
---
47
...
4F
71
...
79
Reserved, not implemented
...
Reserved, not implemented
RegPA
50
80
xxxx
0: PAData[0]
1: PAData[1]
2: PAData[2]
3: PAData[3]
0: PBIOCntl[0]
1: PBIOCntl[1]
2: PBIOCntl[2]
3: PBIOCntl[3]
----
Read port A directly
RegPBCntl
51
81
0000
Port B control
Default: input mode
©
EM Microelectronic-Marin SA, 03/99, Rev. B/
03/02 REV. D/444
Copyright
2002, EM Microelectronic-Marin SA
50
www.emmicroelectronic.com
EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
