R
EM6680
1. Pin Description for EM6680
Table 1 EM6680 pin descriptions
# On
Chip
1
2
3
4
5
6
7*
8
9
SO-8
1
2
3
4
5
6
NC
7
8
Signal
Name
PA0
PA1
PA2
PA3
V
ss
PA4
PA5
V
reg
V
dd
Description
general I/O, serial In, Wake-Up on Change, IRQ source,…
general I/O, serial CLK, timer source, external clock
general I/O, serial Out, freq., CPU reset status output,…
general I/O, serial Rdy/Cs, Interrupt source, Reset
ground – negative supply pin
general I, Reset, timer source, Interrupt source, Wake-Up, Compare I
general I/O, freq, Wake-Up on Change, IRQ source
regulated voltage supported by 100nF tw. V
ss
positive supply pin – capacitance tw. V
dd
(C depends on V
dd
noise)
Figure 3. Typical configuration for V
dd
> 1.5V
Vdd
Vdd
Vreg
Voltage
regulator
Vbat
C
I/O pad
SVLD
4-bit ADC
Level Shifter
uPUS 4bits core
Digital peripherals
RAM 64 x 4 bits
ROM 1536 x 16 bits
Analog peripherals
RC oscillator
Power-on-Reset
Sleep Reset Cnt
Vreg
Capacitor
100nF
C
Vss
For Vdd > 1.5V
Typ_config_vdd+15.vsd
Figure 4. Typical configuration for V
dd
< 1.5V
Vdd
Vdd
Regulated Voltage
Vreg
Voltage
regulator
Vbat
C
I/O pad
SVLD
4-bit ADC
Level Shifter
uPUS 4bits core
Digital peripherals
RAM 64 x 4 bits
ROM 1536 x 16 bits
Analog peripherals
RC oscillator
Power-on-Reset
Sleep Reset Cnt
Vreg
Capacitor
100nF
C
Vss
For Vdd > 1.5V
Typ_config_vdd+15.vsd
NOTE: State of I/O pads may not be defined until V
reg
reaches typ. 0.8V and Power-On-Reset logic
supplied by V
reg
clears them to Inputs.
On I/O pins there are protective diodes towards V
dd
and V
ss
.
Copyright
©
2005, EM Microelectronic-Marin SA
4
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EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
