EN2340QI
Electrical Characteristics
NOTE: VIN=12V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.
Typical values are at TA = 25°C.
PARAMETER
Operating Input Voltage
SYMBOL
PVIN
TEST CONDITIONS
MIN TYP MAX UNITS
4.5
14.0
V
Controller Input Voltage
AVIN
2.5
5.5
V
AVIN Under Voltage
Lock-Out Rising
Voltage above which UVLO is not
asserted
AVINUVLOR
2.3
V
AVIN Under Voltage
Lock-Out Falling
Voltage below which UVLO is
asserted
AVINOVLOF
IAVIN
2.1
7
V
mA
V
AVIN pin Input Current
Internal Linear
Regulator Output
AVINO
3.3
IPVINS
IAVINS
VFB
PVIN=12V, AVIN=3.3V, ENABLE=0V
PVIN=12V, AVIN=3.3V, ENABLE=0V
VIN = 12V, ILOAD = 0, TA = 25°C Only
4.5V ≤ VIN ≤ 14V; 0A ≤ ILOAD ≤ 4A
500
50
μA
μA
V
Shut-Down Supply
Current
Feedback Pin Voltage
Feedback Pin Voltage
0.7425 0.750 0.7575
VFB
0.735
0.750
0.765
V
VFB pin input leakage current
(Note 3)
Feedback Pin Input
Leakage Current
IFB
tRISE
-5
5
nA
ms
nF
VOUT Rise Time
CSS = 47nF (Note 4 and Note 5)
3.2
47
Soft-Start Capacitor
Range
CSS_RANGE
10
68
4
Maximum Continuous
Output Current
IOUT_Max_Cont
A
Over Current Trip Level
Disable Threshold
IOCP
VDISABLE
VENABLE
TENLOCKOUT
IENABLE
Reference Table 2
6
A
V
ENABLE pin logic Low
ENABLE pin logic High
0.0
1.8
0.6
ENABLE Threshold
ENABLE Lockout Time
ENABLE Input Current
Switching Frequency
AVIN
V
8
4
ms
μA
MHz
180k internal pull-down (Note 3)
FSW
RFS =3kΩ
1.0
External SYNC Clock
Frequency Lock Range
FPLL_LOCK
Range of SYNC clock frequency
0.9
1.8
1.8
1.3
MHz
S_IN Threshold – Low
S_IN Threshold – High
S_OUT Threshold – Low
VS_IN_LO
VS_IN_HI
S_IN clock logic low level
S_IN clock logic high level
S_OUT clock logic low level
0.8
2.5
0.8
V
V
V
VS_OUT_LO
S_OUT Threshold –
High
VS_OUT_HI
S_OUT clock logic high level
2.5
V
POK Lower Threshold
POK Output low Voltage
POK Output Hi Voltage
POKLT
VPOKL
VPOKH
VOUT / VOUT_NOM
90
%
V
With 4mA current sink into POK
PVIN range: 4.5V ≤ VIN ≤ 14V
0.4
AVIN
V
POK pin VOH leakage
current (Note 3)
IPOKL
POK high
1
µA
Note 3: Parameter not production tested but is guaranteed by design.
Note 4: Rise time calculation begins when AVIN > VUVLO and ENABLE = HIGH.
Note 5: VOUT Rise Time Accuracy does not include soft-start capacitor tolerance.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 5
06878
April 16, 2012
Rev: B
ENPIRION [ ENPIRION, INC. ]
