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EN5310DI 参数 Datasheet PDF下载

EN5310DI图片预览
型号: EN5310DI
PDF下载: 下载PDF文件 查看货源
内容描述: 1A电压模式同步降压PWM DC -DC转换器 [1A Voltage Mode Synchronous Buck PWM DC-DC Converter]
分类和应用: 转换器
文件页数/大小: 10 页 / 372 K
品牌: ENPIRION [ ENPIRION, INC. ]
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Rev 0.95 – March 2005
EN5310
FUNCTION
NO CONNECT – Do not electrically connect this pin to PCB.
See Note 5.
External feedback voltage input. Option for programming the output voltage with a
resistor divider on V
OUT
.
Remote voltage sense input. Connect this pin to the load voltage at the point to be
regulated.
NO CONNECT – Do not electrically connect this pin to PCB.
See Note 5.
NO CONNECT – Do not electrically connect this pin to PCB.
See Note 5.
Enable input. An input high enables operation. An input low disables operation.
NO CONNECT – Do not electrically connect this pin to PCB.
See Note 5.
Over-Voltage set-point input. When using an external voltage divider and the XFB pin. When
VS0, VS1 and VS2 are left OPEN or pulled high, an additional voltage divider separate from
the XFB pin is required to set the OVP set-point. In this mode, the OVP function is disabled if
this voltage divider is not present.
Pin Descriptions
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
NOTES:
5.
NAME
NC
XFB
VSENSE
NC
NC
ENABLE
NC
XOV
PGND
Power ground for the power stage circuits.
VOUT
Voltage and power output.
NC
PGND
NC
PVIN
VS2
ROCP
VS1
AVIN
AGND
VS0
POK
SS
NO CONNECT – Do not electrically connect this pin to PCB.
See Note 5.
Power ground for the power stage circuits.
NO CONNECT – Do not electrically connect this pin to PCB.
See Note 5.
Power voltage input for the power stage circuits.
Voltage select line 2 input. See Table 1.
Over-Current trip point adjust input. Used for adjusting the OCP trip point.
Voltage select line 1 input. See Table 1.
Analog voltage input for the controller circuits.
Analog ground for the controller circuits.
Voltage select line 0 input. See Table 1.
Power OK is an open drain transistor for power system state indication.
Soft-Start node. A capacitor is connected between this pin and AGND.
This pin is used for engineering test purposes and reserved for future use. Solder, but do not electrically connect this pin to
the PCB.
5
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