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EN25F05 参数 Datasheet PDF下载

EN25F05图片预览
型号: EN25F05
PDF下载: 下载PDF文件 查看货源
内容描述: 512 Kbit的串行闪存与4KB的部门统一 [512 Kbit Serial Flash Memory with 4Kbytes Uniform Sector]
分类和应用: 闪存
文件页数/大小: 32 页 / 1230 K
品牌: EON [ EON SILICON SOLUTION INC. ]
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EN25F05
Read Status Register (RDSR) (05h)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status
Register may be read at any time, even while a Program, Erase or Write Status Register cycle is in
progress. When one of these cycles is in progress, it is recommended to check the Write In Progress
(WIP) bit before sending a new instruction to the device. It is also possible to read the Status Register
continuously, as shown in Figure 7.
Figure 7. Read Status Register Instruction Sequence Diagram
Table 6. Status Register Bit Locations
S7
OTP_LOCK
bit
Status Register
Protect
(note 1)
S6
S5
S4
BP2
S3
BP1
S2
BP0
S1
WEL
S0
(Write In
Progress bit)
1 = write
operation
0 = not in write
operation
volatile bit
SRP
(Block Protected (Block Protected (Block Protected (Write Enable
bits)
bits)
bits)
Latch)
WIP
1 = status
register write
disable
1 = OTP
sector is
protected
Reserved Reserved
bits
bits
(note 2)
Non-volatile bit
(note 2)
Non-volatile bit
(note 2)
Non-volatile bit
1 = write
enable
0 = not write
enable
volatile bit
Non-volatile bit
Note
1. In OTP mode, SRP bit is served as OTP_LOCK bit.
2. See the table “
Protected Area Sizes Sector Organization”.
The status and control bits of the Status Register are as follows:
WIP bit.
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write Status
Register, Program or Erase cycle. When set to 1, such a cycle is in progress, when reset to 0 no such
cycle is in progress.
WEL bit.
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is
reset and no Write Status Register, Program or Erase instruction is accepted.
BP2, BP1, BP0 bits.
The Block Protect (BP2, BP1, BP0) bits are non-volatile. They define the size of
the area to be software protected against Program and Erase instructions. These bits are written with
the Write Status Register (WRSR) instruction. When one or both of the Block Protect (BP2, BP1, BP0)
bits is set to 1, the relevant memory area (as defined in Table 3.) becomes protected against Page
Program (PP) Sector Erase (SE) and , Block Erase (BE), instructions. The Block Protect (BP2, BP1,
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
11
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com
Rev. D, Issue Date: 2010/04/15