EN29F040A
TABLE 1. PIN DESCRIPTION
Pin Name
A0-A18
DQ0-DQ7
Function
Addresses
A0 - A18
18
8
DQ0 - DQ7
EN29F040A
FIGURE 1. LOGIC DIAGRAM
Vcc
Data Inputs/Outputs
Chip Enable
Output Enable
Write Enable
Supply Voltage
(5V
±
10% )
Ground
Vss
CE
OE
WE
CE
OE
WE
Vcc
Vss
TABLE 2. SECTOR ARCHITECTURE
Sector
7
6
5
4
3
2
1
0
ADDRESSES
70000h - 7FFFFh
60000h - 6FFFFh
50000h – 5FFFFh
40000h – 4FFFFh
30000h – 3FFFFh
20000h - 2FFFFh
10000h - 1FFFFh
00000h - 0FFFFh
SIZE (Kbytes)
64
64
64
64
64
64
64
64
A18
1
1
1
1
0
0
0
0
A17
1
1
0
0
1
1
0
0
A16
1
0
1
0
1
0
1
0
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/04/01