EN71NS128B0
Operating Mode (For Asynchronous mode)
Asynchronous Mode
BCR[15]=1
Read
Write
Standby
No operation
Configuration register
write
Configuration register
read
Power
Active
Active
Standby
Idle
Active
Active
CLK ADV# CE# OE# WE# CRE
X
X
H or L
X
X
X
X
X
L
L
H
L
L
L
L
X
X
X
H
L
H
L
X
X
L
H
L
L
L
L
H
H
UB#/
WAIT2 A/DQ[15:0]
LB#
L
L
X
X
X
L
Low-z
High-z
High-z
Low-z
Low-z
Low-z
Data out
Data in
High-z
X
High-z
Config.
Reg.out
Operating Mode (For Synchronous Burst mode)
Burst Mode
BCR[15]=0
Async read
Async write
Standby
No operation
Initial burst read
Initial burst write
Power
Active
Active
Standby
Idle
Active
Active
CLK ADV# CE# OE# WE# CRE
H or L
H or L
H or L
H or L
X
X
L
L
L
L
H
L
L
L
L
X
X
X
X
H
H
L
X
X
H
L
L
L
L
L
L
L
UB#/
WAIT
LB#
L
L
X
X
L
X
Low-z
High-z
High-z
Low-z
Low-z
Low-z
A/DQ[15:0]
Data out
Data in
High-z
X
Address
Address
Data out
or
Data in
High-z
Config.
Reg.out
Burst continue
Configuration register
write
Configuration register
read
Active
H
L
X
X
X
L
Low-z
Active
Active
L
L
L
L
H
L
L
H
H
H
X
L
Low
Low
Note:
X=don’t care. H=logic high. L=logic low. V= Valid data
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com
Rev. C, Issue Date: 2010/08/20
EON [ EON SILICON SOLUTION INC. ]
