eorex
AC Operating Test Conditions
(V
DD
=2.5V±0.2V, T
A
=0°C ~70°
C)
Item
Output Reference Level
Output Load
Input Signal Level
Transition Time of Input Signals
Input Reference Level
EM42AM1684RTA
Conditions
1.25V/1.25V
See diagram as below
V
REF
+0.31V/ V
REF
-0.31V
1ns
V
DDQ
/2
AC Operating Test Characteristics
(V
DD
=2.5V±0.2V, T
A
=0°C ~70°
C)
Symbol
t
DQCK
t
DQSCK
t
CL
,t
CH
t
CK
t
DH
,t
DS
t
DIPW
t
HZ
,t
LZ
t
DQSQ
t
DQSS
t
DSL
,t
DS
H
Parameter
DQ output access from CLK,/CLK
DQS output access from CLK,/CLK
CL low/high level width
CL=2
Clock Cycle Time
CL=2.5
CL=3
DQ and DM hold/setup time
DQ and DM input pulse width for
each input
Data out high/low impedance time
from CLK,/CLK
DQS-DQ skew for associated DQ
signal
Write command to first latching DQS
transition
DQS input valid window
Mode Register Set command cycle
time
Write Preamble setup time
Write Preamble
Address/control input hold/setup
time
Read Preamble
-5
Min.
-0.65
-0.55
0.45
-
6
5
0.4
1.75
-0.7
0.4
0.7
1.25
0.35
2
0
0.4
0.7
0.9
1.1
0.9
0.6
0.4
0.7
Max.
0.65
0.55
0.55
-
12
8
Min.
-0.7
-0.6
0.45
7.5
6
-
0.45
1.75
-0.7
-6
Max.
0.7
0.6
0.55
12
12
-
-7.5
Min.
Max.
-0.75
-0.75
0.45
10
7.5
-
0.5
1.75
0.75
0.75
0.55
12
12
-
Units
ns
ns
t
CK
ns
ns
ns
ns
ns
0.7
-0.75
0.5
0.75
0.75
ns
ns
0.45
0.75
1.25
1.25
t
CK
t
CK
t
CK
ns
0.35
2
0
0.6
0.8
1.1
0.9
0.4
0.35
2
0
0.6
1.0
1.1
t
MRD
t
WPRES
t
WPST
t
IH
,t
IS
t
RPRE
Jul. 2006
t
CK
ns
t
CK
www.eorex.com
7/19
EOREX [ EOREX CORPORATION ]
