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EM448M1684LBA-3FE 参数 Datasheet PDF下载

EM448M1684LBA-3FE图片预览
型号: EM448M1684LBA-3FE
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB ( 4M 】 4Bank 】 16 )双数据速率2 SDRAM [256Mb (4M】4Bank】16) Double DATA RATE 2 SDRAM]
分类和应用: 动态存储器
文件页数/大小: 29 页 / 1543 K
品牌: EOREX [ EOREX CORPORATION ]
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eorex
EM44AM1684LBA
to provide differential pair signaling to the system during both reads
and writes. An EMRS(1) control bit enables or disables all
complementary data strobe signals. In this data sheet, "differential
DQS signals" refers to A10 = 0 of EMRS(1) using LDQS/LDQS and
UDQS/UDQS. "single-ended DQS signals" refers to A10 = 1 of
EMRS(1) using LDQS and UDQS.
(Input Data Mask)
DM is an input mask signal for write data. Input data is masked
when DM is sampled HIGH coincident with that input data during a
Write access. DM is sampled on both edges of DQS. Although DM
pins are input only, the DM loading matches the DQ and DQS
loading.
(Data Input/Output)
Data inputs and outputs are on the same pin.
(Power Supply/Ground)
VDD and VSS are power supply for internal circuits.
(DQ Power Supply/DQ Ground)
VDDQ and VSSQ are power supply for the output buffers.
(DLL Power Supply/DLL Ground)
VDDL and VSSDL are power supply for DLL circuits
(Reference Voltage)
SSTL_1.8 reference voltage
(No Connection)
No internal electrical connection is present
.
B3,F3
UDM,LDM
G8,G2,H7,H3,H1,
H9,F1,F9,C8,
C2,D7,D3,D1,
D9,B1,B9
A1,E1,J9,M9,R1/
A3,E3,J3,N1,P9
A9,C1,C3,C7,C9,E
9,G1,G3,G7,G9/
A7,B2,B8,D2,D8,E
7,F2,F8,H2,H8
J1/J7
J2
A2,E2,L1,R3,R7,
R8
DQ0~15
VDD/VSS
VDDQ/VSSQ
VDDL/VSSDL
VREF
NC
Jul. 2006
5/29
www.eorex.com